ESP32-WROOM-32E carrier PCB: design, layout, and gate checks
Design a reliable ESP32-WROOM-32E carrier with real ESP32-D0WD-V3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →MakeIRL PCB engineering field guide
Real modules, real components, and the full KiCad 9 rule catalog.
Browse 532 practical PCB integration guides for development boards, components, package footprints, manufacturing intents, KiCad 9 DRC/ERC rules, and vibecoded AI hardware.
- Modules & development boards
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- 120
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Modules & development boards
120 guidesESP32-WROOM-32UE carrier PCB: design, layout, and gate checks
Design a reliable ESP32-WROOM-32UE carrier with real ESP32-D0WD-V3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-WROVER-E carrier PCB: design, layout, and gate checks
Design a reliable ESP32-WROVER-E carrier with real ESP32-D0WD-V3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-WROVER-IE carrier PCB: design, layout, and gate checks
Design a reliable ESP32-WROVER-IE carrier with real ESP32-D0WD-V3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-PICO-D4 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-PICO-D4 carrier with real ESP32 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint and.
Read guide →ESP32-PICO-V3-ZERO integration: PCB layout and release checks
Design a reliable ESP32-PICO-V3-ZERO carrier with real ESP32-PICO-V3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-SOLO-1 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-SOLO-1 carrier with real single-core ESP32-S0WD power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-DevKitC V4 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-DevKitC V4 carrier with real ESP32 module, commonly WROOM-32E power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-DevKitM-1 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-DevKitM-1 carrier with real ESP32-MINI-1 module power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →NodeMCU-32S carrier PCB: design, layout, and gate checks
Design a reliable NodeMCU-32S carrier with real ESP32-WROOM-32 module power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →DOIT ESP32 DevKit V1 integration: PCB layout and release checks
Design a reliable DOIT ESP32 DevKit V1 carrier with real ESP32-WROOM-32 module power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Adafruit Feather ESP32 V2 carrier PCB: layout and gate checks
Design a reliable Adafruit Feather ESP32 V2 carrier with real ESP32-PICO-MINI-02 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-S2-WROOM-02 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-S2-WROOM-02 carrier with real ESP32-S2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-S2-WROOM-02U integration: PCB layout and release checks
Design a reliable ESP32-S2-WROOM-02U carrier with real ESP32-S2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-S2-MINI-1 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-S2-MINI-1 carrier with real ESP32-S2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP32-S2-MINI-1U carrier PCB: design, layout, and gate checks
Design a reliable ESP32-S2-MINI-1U carrier with real ESP32-S2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP32-S2-Saola-1 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-S2-Saola-1 carrier with real ESP32-S2-WROVER or WROOM module by board variant power, pinout, footprint, layout, sourcing, and MakeIRL.
Read guide →Adafruit Feather ESP32-S2 carrier PCB: layout and gate checks
Design a reliable Adafruit Feather ESP32-S2 carrier with real ESP32-S2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Adafruit Feather ESP32-S2 TFT PCB carrier: design and checks
Design a reliable Adafruit Feather ESP32-S2 TFT carrier with real ESP32-S2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →SparkFun Thing Plus ESP32-S2 PCB carrier: design and checks
Design a reliable SparkFun Thing Plus ESP32-S2 carrier with real ESP32-S2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-S3-WROOM-1-N8 integration: PCB layout and release checks
Design a reliable ESP32-S3-WROOM-1-N8 carrier with real ESP32-S3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-S3-WROOM-1-N16R8 carrier PCB: layout and gate checks
Design a reliable ESP32-S3-WROOM-1-N16R8 carrier with real ESP32-S3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-S3-WROOM-1U carrier PCB: design, layout, and gate checks
Design a reliable ESP32-S3-WROOM-1U carrier with real ESP32-S3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-S3-MINI-1 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-S3-MINI-1 carrier with real ESP32-S3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP32-S3-MINI-1U carrier PCB: design, layout, and gate checks
Design a reliable ESP32-S3-MINI-1U carrier with real ESP32-S3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP32-S3-DevKitC-1 integration: PCB layout and release checks
Design a reliable ESP32-S3-DevKitC-1 carrier with real ESP32-S3-WROOM-1 or WROOM-1U power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-S3-DevKitM-1 integration: PCB layout and release checks
Design a reliable ESP32-S3-DevKitM-1 carrier with real ESP32-S3-MINI-1 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Adafruit Feather ESP32-S3 4MB/2MB PCB carrier: design and checks
Design a reliable Adafruit Feather ESP32-S3 4MB/2MB carrier with real ESP32-S3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Seeed XIAO ESP32S3 integration: PCB layout and release checks
Design a reliable Seeed XIAO ESP32S3 carrier with real ESP32-S3R8 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Seeed XIAO ESP32S3 Sense carrier PCB: layout and gate checks
Design a reliable Seeed XIAO ESP32S3 Sense carrier with real ESP32-S3R8 with Sense expansion board power, pinout, footprint, layout, sourcing, and MakeIRL.
Read guide →SparkFun Thing Plus ESP32-S3 PCB carrier: design and checks
Design a reliable SparkFun Thing Plus ESP32-S3 carrier with real ESP32-S3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-C3-WROOM-02 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-C3-WROOM-02 carrier with real ESP32-C3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-C3-WROOM-02U integration: PCB layout and release checks
Design a reliable ESP32-C3-WROOM-02U carrier with real ESP32-C3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-C3-MINI-1 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-C3-MINI-1 carrier with real ESP32-C3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP32-C3-MINI-1U carrier PCB: design, layout, and gate checks
Design a reliable ESP32-C3-MINI-1U carrier with real ESP32-C3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP32-C3-DevKitC-02 integration: PCB layout and release checks
Design a reliable ESP32-C3-DevKitC-02 carrier with real ESP32-C3-WROOM-02 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-C3-DevKitM-1 integration: PCB layout and release checks
Design a reliable ESP32-C3-DevKitM-1 carrier with real ESP32-C3-MINI-1 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Seeed XIAO ESP32C3 integration: PCB layout and release checks
Design a reliable Seeed XIAO ESP32C3 carrier with real ESP32-C3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Adafruit QT Py ESP32-C3 carrier PCB: layout and gate checks
Design a reliable Adafruit QT Py ESP32-C3 carrier with real ESP32-C3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →SparkFun Thing Plus ESP32-C3 PCB carrier: design and checks
Design a reliable SparkFun Thing Plus ESP32-C3 carrier with real ESP32-C3 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-C6-WROOM-1 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-C6-WROOM-1 carrier with real ESP32-C6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP32-C6-WROOM-1U carrier PCB: design, layout, and gate checks
Design a reliable ESP32-C6-WROOM-1U carrier with real ESP32-C6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →ESP32-C6-MINI-1 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-C6-MINI-1 carrier with real ESP32-C6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP32-C6-DevKitC-1 integration: PCB layout and release checks
Design a reliable ESP32-C6-DevKitC-1 carrier with real ESP32-C6-WROOM-1 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Seeed XIAO ESP32C6 integration: PCB layout and release checks
Design a reliable Seeed XIAO ESP32C6 carrier with real ESP32-C6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Adafruit Feather ESP32-C6 carrier PCB: layout and gate checks
Design a reliable Adafruit Feather ESP32-C6 carrier with real ESP32-C6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-C2-MINI-1 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-C2-MINI-1 carrier with real ESP8684 / ESP32-C2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-C2-MINI-1U carrier PCB: design, layout, and gate checks
Design a reliable ESP32-C2-MINI-1U carrier with real ESP8684 / ESP32-C2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-C2-DevKitM-1 integration: PCB layout and release checks
Design a reliable ESP32-C2-DevKitM-1 carrier with real ESP32-C2-MINI-1 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP32-H2-MINI-1 carrier PCB: design, layout, and gate checks
Design a reliable ESP32-H2-MINI-1 carrier with real ESP32-H2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP32-H2-MINI-1U carrier PCB: design, layout, and gate checks
Design a reliable ESP32-H2-MINI-1U carrier with real ESP32-H2 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP32-H2-DevKitM-1 integration: PCB layout and release checks
Design a reliable ESP32-H2-DevKitM-1 carrier with real ESP32-H2-MINI-1 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →ESP-01S carrier PCB: design, layout, and gate checks
Design a reliable ESP-01S carrier with real ESP8266EX power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint and.
Read guide →ESP-07S carrier PCB: design, layout, and gate checks
Design a reliable ESP-07S carrier with real ESP8266EX power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint and.
Read guide →ESP-12F carrier PCB: design, layout, and gate checks
Design a reliable ESP-12F carrier with real ESP8266EX power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint and.
Read guide →ESP-WROOM-02D carrier PCB: design, layout, and gate checks
Design a reliable ESP-WROOM-02D carrier with real ESP8266EX power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →ESP-WROOM-02U carrier PCB: design, layout, and gate checks
Design a reliable ESP-WROOM-02U carrier with real ESP8266EX power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →NodeMCU 1.0 ESP-12E integration: PCB layout and release checks
Design a reliable NodeMCU 1.0 ESP-12E carrier with real ESP8266EX on ESP-12E module power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →WEMOS D1 mini carrier PCB: design, layout, and gate checks
Design a reliable WEMOS D1 mini carrier with real ESP8266EX on ESP-12F-class module power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Adafruit Feather HUZZAH ESP8266 PCB carrier: design and checks
Design a reliable Adafruit Feather HUZZAH ESP8266 carrier with real ESP8266EX power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Raspberry Pi Pico carrier PCB: design, layout, and gate checks
Design a reliable Raspberry Pi Pico carrier with real RP2040 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →Raspberry Pi Pico W integration: PCB layout and release checks
Design a reliable Raspberry Pi Pico W carrier with real RP2040 with Infineon CYW43439 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Raspberry Pi Pico 2 integration: PCB layout and release checks
Design a reliable Raspberry Pi Pico 2 carrier with real RP2350A power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Raspberry Pi Pico 2 W integration: PCB layout and release checks
Design a reliable Raspberry Pi Pico 2 W carrier with real RP2350A with Infineon CYW43439 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Adafruit Feather RP2040 carrier PCB: layout and gate checks
Design a reliable Adafruit Feather RP2040 carrier with real RP2040 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Adafruit QT Py RP2040 integration: PCB layout and release checks
Design a reliable Adafruit QT Py RP2040 carrier with real RP2040 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Adafruit ItsyBitsy RP2040 carrier PCB: layout and gate checks
Design a reliable Adafruit ItsyBitsy RP2040 carrier with real RP2040 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →SparkFun Pro Micro RP2040 carrier PCB: layout and gate checks
Design a reliable SparkFun Pro Micro RP2040 carrier with real RP2040 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →SparkFun Thing Plus RP2040 carrier PCB: layout and gate checks
Design a reliable SparkFun Thing Plus RP2040 carrier with real RP2040 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Pimoroni Tiny 2040 integration: PCB layout and release checks
Design a reliable Pimoroni Tiny 2040 carrier with real RP2040 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →Solder Party RP2040 Stamp carrier PCB: layout and gate checks
Design a reliable Solder Party RP2040 Stamp carrier with real RP2040 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Waveshare RP2040-Zero integration: PCB layout and release checks
Design a reliable Waveshare RP2040-Zero carrier with real RP2040 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Arduino Nano RP2040 Connect carrier PCB: layout and gate checks
Design a reliable Arduino Nano RP2040 Connect carrier with real RP2040 with u-blox NINA-W102 power, pinout, footprint, layout, sourcing, and MakeIRL gate.
Read guide →Adafruit Feather RP2350 carrier PCB: layout and gate checks
Design a reliable Adafruit Feather RP2350 carrier with real RP2350A power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Adafruit Feather RP2350 HSTX PCB carrier: design and checks
Design a reliable Adafruit Feather RP2350 HSTX carrier with real RP2350A power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Adafruit QT Py RP2350 integration: PCB layout and release checks
Design a reliable Adafruit QT Py RP2350 carrier with real RP2350A power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →SparkFun Pro Micro RP2350 carrier PCB: layout and gate checks
Design a reliable SparkFun Pro Micro RP2350 carrier with real RP2350 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Pimoroni Pico Plus 2 integration: PCB layout and release checks
Design a reliable Pimoroni Pico Plus 2 carrier with real RP2350B power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →Seeed XIAO SAMD21 carrier PCB: design, layout, and gate checks
Design a reliable Seeed XIAO SAMD21 carrier with real Microchip ATSAMD21G18A power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Seeed XIAO RP2040 carrier PCB: design, layout, and gate checks
Design a reliable Seeed XIAO RP2040 carrier with real RP2040 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →Seeed XIAO RP2350 carrier PCB: design, layout, and gate checks
Design a reliable Seeed XIAO RP2350 carrier with real RP2350A power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint.
Read guide →Seeed XIAO nRF52840 integration: PCB layout and release checks
Design a reliable Seeed XIAO nRF52840 carrier with real Nordic nRF52840 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Seeed XIAO nRF52840 Sense carrier PCB: layout and gate checks
Design a reliable Seeed XIAO nRF52840 Sense carrier with real Nordic nRF52840 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Seeed XIAO MG24 carrier PCB: design, layout, and gate checks
Design a reliable Seeed XIAO MG24 carrier with real Silicon Labs EFR32MG24 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Seeed XIAO RA4M1 carrier PCB: design, layout, and gate checks
Design a reliable Seeed XIAO RA4M1 carrier with real Renesas R7FA4M1AB3CFM power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →STM32F103C8 Blue Pill integration: PCB layout and release checks
Design a reliable STM32F103C8 Blue Pill carrier with real STM32F103C8T6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →WeAct Black Pill STM32F401CC PCB carrier: design and checks
Design a reliable WeAct Black Pill STM32F401CC carrier with real STM32F401CCU6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →WeAct Black Pill STM32F411CE PCB carrier: design and checks
Design a reliable WeAct Black Pill STM32F411CE carrier with real STM32F411CEU6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →NUCLEO-F103RB carrier PCB: design, layout, and gate checks
Design a reliable NUCLEO-F103RB carrier with real STM32F103RBT6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →NUCLEO-F411RE carrier PCB: design, layout, and gate checks
Design a reliable NUCLEO-F411RE carrier with real STM32F411RET6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →NUCLEO-G071RB carrier PCB: design, layout, and gate checks
Design a reliable NUCLEO-G071RB carrier with real STM32G071RBT6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →NUCLEO-G431RB carrier PCB: design, layout, and gate checks
Design a reliable NUCLEO-G431RB carrier with real STM32G431RBT6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →NUCLEO-G474RE carrier PCB: design, layout, and gate checks
Design a reliable NUCLEO-G474RE carrier with real STM32G474RET6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →NUCLEO-L073RZ carrier PCB: design, layout, and gate checks
Design a reliable NUCLEO-L073RZ carrier with real STM32L073RZT6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →NUCLEO-L432KC carrier PCB: design, layout, and gate checks
Design a reliable NUCLEO-L432KC carrier with real STM32L432KCU6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →NUCLEO-U031R8 carrier PCB: design, layout, and gate checks
Design a reliable NUCLEO-U031R8 carrier with real STM32U031R8T6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →NUCLEO-H743ZI2 carrier PCB: design, layout, and gate checks
Design a reliable NUCLEO-H743ZI2 carrier with real STM32H743ZIT6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →WeAct STM32G0B1 Core Board carrier PCB: layout and gate checks
Design a reliable WeAct STM32G0B1 Core Board carrier with real STM32G0B1CBU6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →WeAct STM32H750 Core Board carrier PCB: layout and gate checks
Design a reliable WeAct STM32H750 Core Board carrier with real STM32H750VBT6 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Raytac MDBT42Q-512KV2 integration: PCB layout and release checks
Design a reliable Raytac MDBT42Q-512KV2 carrier with real Nordic nRF52832 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →EBYTE E73-2G4M04S1B integration: PCB layout and release checks
Design a reliable EBYTE E73-2G4M04S1B carrier with real Nordic nRF52832 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Raytac MDBT50Q-1MV2 integration: PCB layout and release checks
Design a reliable Raytac MDBT50Q-1MV2 carrier with real Nordic nRF52840 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →EBYTE E73-2G4M08S1C integration: PCB layout and release checks
Design a reliable EBYTE E73-2G4M08S1C carrier with real Nordic nRF52840 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Adafruit Feather nRF52840 Express PCB carrier: design and checks
Design a reliable Adafruit Feather nRF52840 Express carrier with real Nordic nRF52840 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Arduino Nano 33 BLE integration: PCB layout and release checks
Design a reliable Arduino Nano 33 BLE carrier with real u-blox NINA-B306 with nRF52840 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Arduino Uno R3 carrier PCB: design, layout, and gate checks
Design a reliable Arduino Uno R3 carrier with real Microchip ATmega328P power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Arduino Uno R4 Minima integration: PCB layout and release checks
Design a reliable Arduino Uno R4 Minima carrier with real Renesas RA4M1 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Arduino Uno R4 WiFi integration: PCB layout and release checks
Design a reliable Arduino Uno R4 WiFi carrier with real Renesas RA4M1 plus ESP32-S3-MINI-1 power, pinout, footprint, layout, sourcing, and MakeIRL gate.
Read guide →Arduino Nano Every integration: PCB layout and release checks
Design a reliable Arduino Nano Every carrier with real Microchip ATmega4809 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →SparkFun Pro Micro 5V/16MHz carrier PCB: layout and gate checks
Design a reliable SparkFun Pro Micro 5V/16MHz carrier with real Microchip ATmega32U4 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →SparkFun Pro Micro 3.3V/8MHz PCB carrier: design and checks
Design a reliable SparkFun Pro Micro 3.3V/8MHz carrier with real Microchip ATmega32U4 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Arduino MKR WiFi 1010 integration: PCB layout and release checks
Design a reliable Arduino MKR WiFi 1010 carrier with real Microchip SAMD21G18A plus u-blox NINA-W102 power, pinout, footprint, layout, sourcing, and MakeIRL.
Read guide →PJRC Teensy 4.0 carrier PCB: design, layout, and gate checks
Design a reliable PJRC Teensy 4.0 carrier with real NXP i.MX RT1062 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →PJRC Teensy 4.1 carrier PCB: design, layout, and gate checks
Design a reliable PJRC Teensy 4.1 carrier with real NXP i.MX RT1062 power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real.
Read guide →RAK3172 carrier PCB: design, layout, and gate checks
Design a reliable RAK3172 carrier with real STM32WLE5CC power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance. Review the real footprint and.
Read guide →RAK4631 WisBlock Core integration: PCB layout and release checks
Design a reliable RAK4631 WisBlock Core carrier with real Nordic nRF52840 plus Semtech SX1262 power, pinout, footprint, layout, sourcing, and MakeIRL gate.
Read guide →HopeRF RFM95W carrier PCB: design, layout, and gate checks
Design a reliable HopeRF RFM95W carrier with real Semtech SX1276-class LoRa transceiver power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →HopeRF RFM96W carrier PCB: design, layout, and gate checks
Design a reliable HopeRF RFM96W carrier with real Semtech SX1278-class LoRa transceiver power, pinout, footprint, layout, sourcing, and MakeIRL gate guidance.
Read guide →Heltec WiFi LoRa 32 V3 carrier PCB: layout and gate checks
Design a reliable Heltec WiFi LoRa 32 V3 carrier with real ESP32-S3FN8 plus Semtech SX1262 power, pinout, footprint, layout, sourcing, and MakeIRL gate.
Read guide →Heltec Wireless Stick Lite V3 PCB carrier: design and checks
Design a reliable Heltec Wireless Stick Lite V3 carrier with real ESP32-S3FN8 plus Semtech SX1262 power, pinout, footprint, layout, sourcing, and MakeIRL gate.
Read guide →Parts, connectors & sensors
120 guidesGCT USB4105-GF-A PCB footprint, checks, and sourcing guide
Add GCT USB4105-GF-A to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →GCT USB4085-GF-A PCB footprint, checks, and sourcing guide
Add GCT USB4085-GF-A to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →GCT USB4110-GF-A PCB footprint, checks, and sourcing guide
Add GCT USB4110-GF-A to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding Amphenol 12401610E4#2A to a PCB: layout and gate checks
Add Amphenol 12401610E4#2A to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →HRO TYPE-C-31-M-12 PCB footprint, checks, and sourcing guide
Add HRO TYPE-C-31-M-12 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Molex 105450-0101 PCB footprint, checks, and sourcing guide
Add Molex 105450-0101 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →JAE DX07S016JA1R1500 PCB footprint, checks, and sourcing guide
Add JAE DX07S016JA1R1500 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Würth 632723300011 PCB footprint, checks, and sourcing guide
Add Würth 632723300011 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →JST SM04B-SRSS-TB PCB footprint, checks, and sourcing guide
Add JST SM04B-SRSS-TB to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →JST BM04B-SRSS-TB PCB footprint, checks, and sourcing guide
Add JST BM04B-SRSS-TB to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →JST SM06B-SRSS-TB PCB footprint, checks, and sourcing guide
Add JST SM06B-SRSS-TB to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →JST S2B-PH-K-S PCB footprint, checks, and sourcing guide
Add JST S2B-PH-K-S to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →JST B2B-PH-K-S PCB footprint, checks, and sourcing guide
Add JST B2B-PH-K-S to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →JST S3B-PH-K-S PCB footprint, checks, and sourcing guide
Add JST S3B-PH-K-S to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →JST B4B-PH-K-S PCB footprint, checks, and sourcing guide
Add JST B4B-PH-K-S to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →JST S4B-PH-SM4-TB PCB footprint, checks, and sourcing guide
Add JST S4B-PH-SM4-TB to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →JST BM04B-GHS-TBT PCB footprint, checks, and sourcing guide
Add JST BM04B-GHS-TBT to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →JST SM06B-GHS-TB PCB footprint, checks, and sourcing guide
Add JST SM06B-GHS-TB to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →JST B2B-XH-A PCB footprint, checks, and sourcing guide
Add JST B2B-XH-A to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →JST S4B-XH-A PCB footprint, checks, and sourcing guide
Add JST S4B-XH-A to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Seeed Grove 4-pin right-angle connector PCB integration and checks
Add Seeed Grove 4-pin right-angle connector to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Molex PicoBlade 53261-0271: PCB footprint and gate checks
Add Molex PicoBlade 53261-0271 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Molex Micro-Lock Plus 505568-0471 PCB integration and checks
Add Molex Micro-Lock Plus 505568-0471 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →TE Connectivity Micro-MaTch 215079-4 PCB integration and checks
Add TE Connectivity Micro-MaTch 215079-4 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Bosch BME280 PCB footprint, checks, and sourcing guide
Add Bosch BME280 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Bosch BMP280 PCB footprint, checks, and sourcing guide
Add Bosch BMP280 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Bosch BME680 PCB footprint, checks, and sourcing guide
Add Bosch BME680 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Bosch BME688 PCB footprint, checks, and sourcing guide
Add Bosch BME688 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Bosch BMP390 PCB footprint, checks, and sourcing guide
Add Bosch BMP390 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Adding Sensirion SHT31-DIS-B to a PCB: layout and gate checks
Add Sensirion SHT31-DIS-B to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Sensirion SHT40-AD1B PCB footprint, checks, and sourcing guide
Add Sensirion SHT40-AD1B to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Sensirion SHT45-AD1B PCB footprint, checks, and sourcing guide
Add Sensirion SHT45-AD1B to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Texas Instruments HDC1080DMBR: PCB footprint and gate checks
Add Texas Instruments HDC1080DMBR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →ASAIR AHT20 PCB footprint, checks, and sourcing guide
Add ASAIR AHT20 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Microchip MCP9808 PCB footprint, checks, and sourcing guide
Add Microchip MCP9808 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding Texas Instruments TMP117 to a PCB: layout and gate checks
Add Texas Instruments TMP117 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding Analog Devices DS18B20+ to a PCB: layout and gate checks
Add Analog Devices DS18B20+ to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →NXP LM75BDP PCB footprint, checks, and sourcing guide
Add NXP LM75BDP to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Adding TDK InvenSense MPU-6050 to a PCB: layout and gate checks
Add TDK InvenSense MPU-6050 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding TDK InvenSense MPU-9250 to a PCB: layout and gate checks
Add TDK InvenSense MPU-9250 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding TDK InvenSense ICM-20948 to a PCB: layout and gate checks
Add TDK InvenSense ICM-20948 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →TDK InvenSense ICM-42688-P: PCB footprint and gate checks
Add TDK InvenSense ICM-42688-P to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Bosch BMI270 PCB footprint, checks, and sourcing guide
Add Bosch BMI270 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Bosch BNO055 PCB footprint, checks, and sourcing guide
Add Bosch BNO055 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →STMicroelectronics LSM6DSOX: PCB footprint and gate checks
Add STMicroelectronics LSM6DSOX to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Adding STMicroelectronics LIS3DH to a PCB: layout and gate checks
Add STMicroelectronics LIS3DH to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes.
Read guide →Adding Analog Devices ADXL345 to a PCB: layout and gate checks
Add Analog Devices ADXL345 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding Analog Devices ADXL343 to a PCB: layout and gate checks
Add Analog Devices ADXL343 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →STMicroelectronics LIS2MDL: PCB footprint and gate checks
Add STMicroelectronics LIS2MDL to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Adding Texas Instruments INA219 to a PCB: layout and gate checks
Add Texas Instruments INA219 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding Texas Instruments INA226 to a PCB: layout and gate checks
Add Texas Instruments INA226 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding Texas Instruments INA260 to a PCB: layout and gate checks
Add Texas Instruments INA260 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding Allegro ACS712ELCTR-05B-T to a PCB: layout and gate checks
Add Allegro ACS712ELCTR-05B-T to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes.
Read guide →Analog Devices MAX31855KASA+: PCB footprint and gate checks
Add Analog Devices MAX31855KASA+ to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Analog Devices MAX31865AAP+: PCB footprint and gate checks
Add Analog Devices MAX31865AAP+ to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →STMicroelectronics VL53L0CXV0DH/1 PCB integration and checks
Add STMicroelectronics VL53L0CXV0DH/1 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →STMicroelectronics VL53L1CXV0FY/1 PCB integration and checks
Add STMicroelectronics VL53L1CXV0FY/1 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Vishay VCNL4040M3OE PCB footprint, checks, and sourcing guide
Add Vishay VCNL4040M3OE to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Broadcom APDS-9960 PCB footprint, checks, and sourcing guide
Add Broadcom APDS-9960 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →ams OSRAM TSL25911FN PCB footprint, checks, and sourcing guide
Add ams OSRAM TSL25911FN to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Vishay VEML7700-TT PCB footprint, checks, and sourcing guide
Add Vishay VEML7700-TT to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →ROHM BH1750FVI PCB footprint, checks, and sourcing guide
Add ROHM BH1750FVI to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Adding Analog Devices MAX30102 to a PCB: layout and gate checks
Add Analog Devices MAX30102 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding ams OSRAM AS5600-ASOM to a PCB: layout and gate checks
Add ams OSRAM AS5600-ASOM to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Melexis MLX90393SLW-ABA-011: PCB footprint and gate checks
Add Melexis MLX90393SLW-ABA-011 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Adding AVIA Semiconductor HX711 to a PCB: layout and gate checks
Add AVIA Semiconductor HX711 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Texas Instruments ADS1115IDGSR: PCB footprint and gate checks
Add Texas Instruments ADS1115IDGSR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →ams CCS811B-JOPR PCB footprint, checks, and sourcing guide
Add ams CCS811B-JOPR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Sensirion SGP30 PCB footprint, checks, and sourcing guide
Add Sensirion SGP30 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Sensirion SGP40 PCB footprint, checks, and sourcing guide
Add Sensirion SGP40 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding TDK InvenSense ICS-43434 to a PCB: layout and gate checks
Add TDK InvenSense ICS-43434 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding Knowles SPH0645LM4H-B to a PCB: layout and gate checks
Add Knowles SPH0645LM4H-B to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →AMS1117-3.3 PCB footprint, checks, and sourcing guide
Add AMS1117-3.3 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Adding TI LM1117MPX-3.3/NOPB to a PCB: layout and gate checks
Add TI LM1117MPX-3.3/NOPB to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Diodes Inc. AP2112K-3.3TRG1: PCB footprint and gate checks
Add Diodes Inc. AP2112K-3.3TRG1 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Richtek RT9080-33GJ5 PCB footprint, checks, and sourcing guide
Add Richtek RT9080-33GJ5 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Microchip MIC5504-3.3YM5-TR: PCB footprint and gate checks
Add Microchip MIC5504-3.3YM5-TR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Microchip MCP1700T-3302E/TT: PCB footprint and gate checks
Add Microchip MCP1700T-3302E/TT to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Microchip MCP1703AT-3302E/CB: PCB footprint and gate checks
Add Microchip MCP1703AT-3302E/CB to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Texas Instruments TLV75533PDBVR: PCB footprint and gate checks
Add Texas Instruments TLV75533PDBVR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Texas Instruments TPS7A0233PDBVR: PCB footprint and gate checks
Add Texas Instruments TPS7A0233PDBVR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Torex XC6206P332MR-G PCB footprint, checks, and sourcing guide
Add Torex XC6206P332MR-G to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding MICRONE ME6211C33M5G-N to a PCB: layout and gate checks
Add MICRONE ME6211C33M5G-N to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Texas Instruments LP5907MFX-3.3/NOPB PCB integration and checks
Add Texas Instruments LP5907MFX-3.3/NOPB to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Adding Monolithic Power MP1584EN to a PCB: layout and gate checks
Add Monolithic Power MP1584EN to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes.
Read guide →Adding Monolithic Power MP2307DN to a PCB: layout and gate checks
Add Monolithic Power MP2307DN to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes.
Read guide →Texas Instruments TPS62160DGKR: PCB footprint and gate checks
Add Texas Instruments TPS62160DGKR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Texas Instruments TPS62162DSGR: PCB footprint and gate checks
Add Texas Instruments TPS62162DSGR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Texas Instruments TPS62840DLCR: PCB footprint and gate checks
Add Texas Instruments TPS62840DLCR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Texas Instruments TPS63031DSKR: PCB footprint and gate checks
Add Texas Instruments TPS63031DSKR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Texas Instruments TPS63070RNMR: PCB footprint and gate checks
Add Texas Instruments TPS63070RNMR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Texas Instruments LM2596S-ADJ/NOPB PCB integration and checks
Add Texas Instruments LM2596S-ADJ/NOPB to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Adding Diodes Inc. AP63203WU-7 to a PCB: layout and gate checks
Add Diodes Inc. AP63203WU-7 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding Diodes Inc. AP63300WU-7 to a PCB: layout and gate checks
Add Diodes Inc. AP63300WU-7 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Aerosemi MT3608 PCB footprint, checks, and sourcing guide
Add Aerosemi MT3608 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Texas Instruments TPS61023DRLR: PCB footprint and gate checks
Add Texas Instruments TPS61023DRLR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Nexperia 74HC595D PCB footprint, checks, and sourcing guide
Add Nexperia 74HC595D to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Nexperia 74HC165D PCB footprint, checks, and sourcing guide
Add Nexperia 74HC165D to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Nexperia 74HC14D PCB footprint, checks, and sourcing guide
Add Nexperia 74HC14D to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Texas Instruments SN74LVC1T45DBVR PCB integration and checks
Add Texas Instruments SN74LVC1T45DBVR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Texas Instruments TXS0108EPWR: PCB footprint and gate checks
Add Texas Instruments TXS0108EPWR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Texas Instruments PCA9306DCTR: PCB footprint and gate checks
Add Texas Instruments PCA9306DCTR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Adding Microchip MCP2515T-I/SO to a PCB: layout and gate checks
Add Microchip MCP2515T-I/SO to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Texas Instruments SN65HVD230DR: PCB footprint and gate checks
Add Texas Instruments SN65HVD230DR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Adding Microchip MCP2562FD-E/SN to a PCB: layout and gate checks
Add Microchip MCP2562FD-E/SN to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →NXP PCF8574T PCB footprint, checks, and sourcing guide
Add NXP PCF8574T to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Adding Microchip MCP23017-E/SO to a PCB: layout and gate checks
Add Microchip MCP23017-E/SO to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Texas Instruments TCA9548APWR: PCB footprint and gate checks
Add Texas Instruments TCA9548APWR to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →NXP PCA9685PW PCB footprint, checks, and sourcing guide
Add NXP PCA9685PW to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing.
Read guide →Adding Solomon Systech SSD1306 to a PCB: layout and gate checks
Add Solomon Systech SSD1306 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Sino Wealth SH1106G PCB footprint, checks, and sourcing guide
Add Sino Wealth SH1106G to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Worldsemi WS2812B-V5 PCB footprint, checks, and sourcing guide
Add Worldsemi WS2812B-V5 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Opsco Optoelectronics SK6812MINI-E PCB integration and checks
Add Opsco Optoelectronics SK6812MINI-E to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →WCH CH340C PCB footprint, checks, and sourcing guide
Add WCH CH340C to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint, sourcing, and.
Read guide →Silicon Labs CP2102N-A02-GQFN24: PCB footprint and gate checks
Add Silicon Labs CP2102N-A02-GQFN24 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Winbond W25Q128JVSIQ PCB footprint, checks, and sourcing guide
Add Winbond W25Q128JVSIQ to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Adding Microchip AT24C32D-SSHM-T to a PCB: layout and gate checks
Add Microchip AT24C32D-SSHM-T to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes.
Read guide →Adding Analog Devices DS3231MZ+ to a PCB: layout and gate checks
Add Analog Devices DS3231MZ+ to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.
Read guide →Top Power ASIC TP4056-42-ESOP8: PCB footprint and gate checks
Add Top Power ASIC TP4056-42-ESOP8 to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →Microchip MCP73831T-2ACI/OT: PCB footprint and gate checks
Add Microchip MCP73831T-2ACI/OT to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance.
Read guide →KiCad 9 DRC & ERC rules
102 guidesKiCad annular_width DRC: what it means and how to fix it
Understand KiCad 9's annular_width DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad clearance DRC: what it means and how to fix it
Understand KiCad 9's clearance DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad connection_width DRC: what it means and how to fix it
Understand KiCad 9's connection_width DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →copper_edge_clearance DRC in KiCad: cause, severity, and fix
Understand KiCad 9's copper_edge_clearance DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad copper_sliver DRC: what it means and how to fix it
Understand KiCad 9's copper_sliver DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad courtyards_overlap DRC: what it means and how to fix it
Understand KiCad 9's courtyards_overlap DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad creepage DRC: what it means and how to fix it
Understand KiCad 9's creepage DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →Fix KiCad diff_pair_gap_out_of_range DRC: meaning and severity
Understand KiCad 9's diff_pair_gap_out_of_range DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →KiCad diff_pair_uncoupled_length_too_long DRC: meaning and fix
Understand KiCad 9's diff_pair_uncoupled_length_too_long DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical.
Read guide →KiCad drill_out_of_range DRC: what it means and how to fix it
Understand KiCad 9's drill_out_of_range DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad duplicate_footprints DRC: what it means and how to fix it
Understand KiCad 9's duplicate_footprints DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad extra_footprint DRC: what it means and how to fix it
Understand KiCad 9's extra_footprint DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad footprint DRC: what it means and how to fix it
Understand KiCad 9's footprint DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →Fix KiCad footprint_filters_mismatch DRC: meaning and severity
Understand KiCad 9's footprint_filters_mismatch DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →Fix KiCad footprint_symbol_mismatch DRC: meaning and severity
Understand KiCad 9's footprint_symbol_mismatch DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →footprint_type_mismatch DRC in KiCad: cause, severity, and fix
Understand KiCad 9's footprint_type_mismatch DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →KiCad hole_clearance DRC: what it means and how to fix it
Understand KiCad 9's hole_clearance DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad hole_near_hole DRC: what it means and how to fix it
Understand KiCad 9's hole_near_hole DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad hole_to_hole DRC: what it means and how to fix it
Understand KiCad 9's hole_to_hole DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad holes_co_located DRC: what it means and how to fix it
Understand KiCad 9's holes_co_located DRC rule, its MakeIRL S1 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad invalid_outline DRC: what it means and how to fix it
Understand KiCad 9's invalid_outline DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad isolated_copper DRC: what it means and how to fix it
Understand KiCad 9's isolated_copper DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →item_on_disabled_layer DRC in KiCad: cause, severity, and fix
Understand KiCad 9's item_on_disabled_layer DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad items_not_allowed DRC: what it means and how to fix it
Understand KiCad 9's items_not_allowed DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad length_out_of_range DRC: what it means and how to fix it
Understand KiCad 9's length_out_of_range DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad lib_footprint_issues DRC: what it means and how to fix it
Understand KiCad 9's lib_footprint_issues DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →lib_footprint_mismatch DRC in KiCad: cause, severity, and fix
Understand KiCad 9's lib_footprint_mismatch DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad malformed_courtyard DRC: what it means and how to fix it
Understand KiCad 9's malformed_courtyard DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →Fix KiCad microvia_drill_out_of_range DRC: meaning and severity
Understand KiCad 9's microvia_drill_out_of_range DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →Fix KiCad mirrored_text_on_front_layer DRC: meaning and severity
Understand KiCad 9's mirrored_text_on_front_layer DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →KiCad missing_courtyard DRC: what it means and how to fix it
Understand KiCad 9's missing_courtyard DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad missing_footprint DRC: what it means and how to fix it
Understand KiCad 9's missing_footprint DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad net_conflict DRC: what it means and how to fix it
Understand KiCad 9's net_conflict DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad nonmirrored_text_on_back_layer DRC: meaning and fix
Understand KiCad 9's nonmirrored_text_on_back_layer DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical.
Read guide →npth_inside_courtyard DRC in KiCad: cause, severity, and fix
Understand KiCad 9's npth_inside_courtyard DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad padstack DRC: what it means and how to fix it
Understand KiCad 9's padstack DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad pth_inside_courtyard DRC: what it means and how to fix it
Understand KiCad 9's pth_inside_courtyard DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad shorting_items DRC: what it means and how to fix it
Understand KiCad 9's shorting_items DRC rule, its MakeIRL S1 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad silk_edge_clearance DRC: what it means and how to fix it
Understand KiCad 9's silk_edge_clearance DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad silk_over_copper DRC: what it means and how to fix it
Understand KiCad 9's silk_over_copper DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad silk_overlap DRC: what it means and how to fix it
Understand KiCad 9's silk_overlap DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad skew_out_of_range DRC: what it means and how to fix it
Understand KiCad 9's skew_out_of_range DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad solder_mask_bridge DRC: what it means and how to fix it
Understand KiCad 9's solder_mask_bridge DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad starved_thermal DRC: what it means and how to fix it
Understand KiCad 9's starved_thermal DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad text_height DRC: what it means and how to fix it
Understand KiCad 9's text_height DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad text_thickness DRC: what it means and how to fix it
Understand KiCad 9's text_thickness DRC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →Fix KiCad through_hole_pad_without_hole DRC: meaning and severity
Understand KiCad 9's through_hole_pad_without_hole DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →KiCad too_many_vias DRC: what it means and how to fix it
Understand KiCad 9's too_many_vias DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad track_angle DRC: what it means and how to fix it
Understand KiCad 9's track_angle DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad track_dangling DRC: what it means and how to fix it
Understand KiCad 9's track_dangling DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad track_segment_length DRC: what it means and how to fix it
Understand KiCad 9's track_segment_length DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad track_width DRC: what it means and how to fix it
Understand KiCad 9's track_width DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad tracks_crossing DRC: what it means and how to fix it
Understand KiCad 9's tracks_crossing DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad unconnected_items DRC: what it means and how to fix it
Understand KiCad 9's unconnected_items DRC rule, its MakeIRL S1 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad unresolved_variable DRC: what it means and how to fix it
Understand KiCad 9's unresolved_variable DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad via_dangling DRC: what it means and how to fix it
Understand KiCad 9's via_dangling DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad zone_has_empty_net DRC: what it means and how to fix it
Understand KiCad 9's zone_has_empty_net DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad zones_intersect DRC: what it means and how to fix it
Understand KiCad 9's zones_intersect DRC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →bus_definition_conflict ERC in KiCad: cause, severity, and fix
Understand KiCad 9's bus_definition_conflict ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →KiCad bus_entry_needed ERC: what it means and how to fix it
Understand KiCad 9's bus_entry_needed ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad bus_label_syntax ERC: what it means and how to fix it
Understand KiCad 9's bus_label_syntax ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad bus_to_bus_conflict ERC: what it means and how to fix it
Understand KiCad 9's bus_to_bus_conflict ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad bus_to_net_conflict ERC: what it means and how to fix it
Understand KiCad 9's bus_to_net_conflict ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →conflicting_netclasses ERC in KiCad: cause, severity, and fix
Understand KiCad 9's conflicting_netclasses ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →Fix KiCad different_unit_footprint ERC: meaning and severity
Understand KiCad 9's different_unit_footprint ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →KiCad different_unit_net ERC: what it means and how to fix it
Understand KiCad 9's different_unit_net ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad duplicate_reference ERC: what it means and how to fix it
Understand KiCad 9's duplicate_reference ERC rule, its MakeIRL S1 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →duplicate_sheet_names ERC in KiCad: cause, severity, and fix
Understand KiCad 9's duplicate_sheet_names ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad endpoint_off_grid ERC: what it means and how to fix it
Understand KiCad 9's endpoint_off_grid ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad extra_units ERC: what it means and how to fix it
Understand KiCad 9's extra_units ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad footprint_filter ERC: what it means and how to fix it
Understand KiCad 9's footprint_filter ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →footprint_link_issues ERC in KiCad: cause, severity, and fix
Understand KiCad 9's footprint_link_issues ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad four_way_junction ERC: what it means and how to fix it
Understand KiCad 9's four_way_junction ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →global_label_dangling ERC in KiCad: cause, severity, and fix
Understand KiCad 9's global_label_dangling ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad hier_label_mismatch ERC: what it means and how to fix it
Understand KiCad 9's hier_label_mismatch ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad label_dangling ERC: what it means and how to fix it
Understand KiCad 9's label_dangling ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad label_multiple_wires ERC: what it means and how to fix it
Understand KiCad 9's label_multiple_wires ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad lib_symbol_issues ERC: what it means and how to fix it
Understand KiCad 9's lib_symbol_issues ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad lib_symbol_mismatch ERC: what it means and how to fix it
Understand KiCad 9's lib_symbol_mismatch ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad missing_bidi_pin ERC: what it means and how to fix it
Understand KiCad 9's missing_bidi_pin ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad missing_input_pin ERC: what it means and how to fix it
Understand KiCad 9's missing_input_pin ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad missing_power_pin ERC: what it means and how to fix it
Understand KiCad 9's missing_power_pin ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad missing_unit ERC: what it means and how to fix it
Understand KiCad 9's missing_unit ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad multiple_net_names ERC: what it means and how to fix it
Understand KiCad 9's multiple_net_names ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad net_not_bus_member ERC: what it means and how to fix it
Understand KiCad 9's net_not_bus_member ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad no_connect_connected ERC: what it means and how to fix it
Understand KiCad 9's no_connect_connected ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad no_connect_dangling ERC: what it means and how to fix it
Understand KiCad 9's no_connect_dangling ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad pin_not_connected ERC: what it means and how to fix it
Understand KiCad 9's pin_not_connected ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad pin_not_driven ERC: what it means and how to fix it
Understand KiCad 9's pin_not_driven ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad pin_to_pin ERC: what it means and how to fix it
Understand KiCad 9's pin_to_pin ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad power_pin_not_driven ERC: what it means and how to fix it
Understand KiCad 9's power_pin_not_driven ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →same_local_global_label ERC in KiCad: cause, severity, and fix
Understand KiCad 9's same_local_global_label ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →similar_label_and_power ERC in KiCad: cause, severity, and fix
Understand KiCad 9's similar_label_and_power ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →KiCad similar_labels ERC: what it means and how to fix it
Understand KiCad 9's similar_labels ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →KiCad similar_power ERC: what it means and how to fix it
Understand KiCad 9's similar_power ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →simulation_model_issue ERC in KiCad: cause, severity, and fix
Understand KiCad 9's simulation_model_issue ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad single_global_label ERC: what it means and how to fix it
Understand KiCad 9's single_global_label ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad unannotated ERC: what it means and how to fix it
Understand KiCad 9's unannotated ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →Fix KiCad unconnected_wire_endpoint ERC: meaning and severity
Understand KiCad 9's unconnected_wire_endpoint ERC rule, its MakeIRL S3 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad.
Read guide →KiCad unit_value_mismatch ERC: what it means and how to fix it
Understand KiCad 9's unit_value_mismatch ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad unresolved_variable ERC: what it means and how to fix it
Understand KiCad 9's unresolved_variable ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair.
Read guide →KiCad wire_dangling ERC: what it means and how to fix it
Understand KiCad 9's wire_dangling ERC rule, its MakeIRL S2 gate class, why it fires, and how to fix and verify it. Includes a practical KiCad repair workflow.
Read guide →Package footprints & DFM
80 guides0402 PCB Footprint: Dimensions, DFM, and Assembly Guide
Design a reliable 0402 footprint with real 1.0 × 0.5 mm geometry, solder-mask limits, paste control, placement tolerances, and gate checks before release.
Read guide →0603 PCB Footprint: Dimensions, DFM, and Assembly Guide
Build a dependable 0603 land pattern around its 1.6 × 0.8 mm body, balanced pads, reflow behavior, hand rework, inspection, and PCB gate checks.
Read guide →0805 PCB Footprint: Dimensions, DFM, and Assembly Guide
Use the 2.0 × 1.25 mm 0805 package correctly with part-specific lands, thermal balance, power derating, hand soldering, and manufacturing checks.
Read guide →1206 PCB Footprint: Dimensions, DFM, and Assembly Guide
Plan a 3.2 × 1.6 mm 1206 footprint for robust hand assembly, higher-voltage spacing, thermal behavior, depanelization strain, and PCB DFM checks.
Read guide →1210 PCB Footprint: Dimensions, DFM, and Assembly Guide
Design a 3.2 × 2.5 mm 1210 footprint with correct MLCC stress control, paste volume, polarity handling, power limits, and manufacturing gate checks.
Read guide →2512 PCB Footprint: Dimensions, DFM, and Assembly Guide
Lay out a 6.3 × 3.2 mm 2512 power component with Kelvin sensing, copper heat spreading, paste control, pulse derating, and meaningful gate checks.
Read guide →SOT-23-3 PCB Footprint: Dimensions, DFM, and Assembly Guide
Create a correct SOT-23-3 footprint using its common 2.9 × 1.3 mm body, 0.95 mm pitch, device-specific pinout, reflow geometry, and gate checks.
Read guide →SOT-23-5 PCB Footprint: Dimensions, DFM, and Assembly Guide
Build a reliable SOT-23-5 land pattern around its 0.95 mm pitch, compact regulator use, thermal limits, exposed lead inspection, and parity checks.
Read guide →SOT-23-6 PCB Footprint: Dimensions, DFM, and Assembly Guide
Lay out SOT-23-6 with its 0.95 mm pitch, three leads per side, exact functional pin map, compact thermal path, solder-mask web, and inspection plan.
Read guide →SOT-223 PCB Footprint: Dimensions, Thermal DFM, Assembly
Design SOT-223 lands for its large tab, roughly 6.5 × 3.5 mm body, 2.3 mm lead pitch, copper heat spreading, paste balance, and thermal checks.
Read guide →SOT-89-3 PCB Footprint: Dimensions, Thermal DFM, Assembly
Use SOT-89-3 correctly with its compact tabbed body, about 1.5 mm lead pitch, device-specific center tab net, copper cooling, and inspection checks.
Read guide →SOIC-8 PCB Footprint: Dimensions, DFM, and Assembly Guide
Lay out the common narrow SOIC-8 with a 3.9 mm body, 1.27 mm lead pitch, visible fillets, pin-one control, hand soldering, and robust DFM checks.
Read guide →SOIC-14 PCB Footprint: Dimensions, DFM, and Assembly Guide
Design a narrow SOIC-14 footprint with its 3.9 × 8.7 mm body, 1.27 mm pitch, row alignment, pin-one marking, reflow balance, and inspection checks.
Read guide →SOIC-16 PCB Footprint: Dimensions, DFM, and Assembly Guide
Create a narrow SOIC-16 land pattern around its 3.9 × 9.9 mm body and 1.27 mm pitch, with correct variant selection, routing, reflow, and gate review.
Read guide →TSSOP-8 PCB Footprint: Dimensions, DFM, and Assembly Guide
Lay out a thin TSSOP-8 with its common 3.0 mm body and 0.65 mm pitch, controlled mask dams, fine-pitch soldering, pin-one marking, and AOI access.
Read guide →TSSOP-14 PCB Footprint: Dimensions, DFM, and Assembly Guide
Design TSSOP-14 around a 5.0 × 4.4 mm body and 0.65 mm pitch, managing long-row alignment, mask slivers, drag soldering, inspection, and parity.
Read guide →TSSOP-16 PCB Footprint: Dimensions, DFM, and Assembly Guide
Create a TSSOP-16 footprint with 0.65 mm pitch, common 5.0 × 4.4 mm body geometry, fine-pitch routing, paste control, lead inspection, and gate checks.
Read guide →TSSOP-20 PCB Footprint: Dimensions, DFM, and Assembly Guide
Lay out TSSOP-20 with its typical 6.5 × 4.4 mm body and 0.65 mm pitch, planning pin escape, mask registration, reflow alignment, and full lead inspection.
Read guide →MSOP-8 PCB Footprint: Dimensions, DFM, and Assembly Guide
Design MSOP-8 around its compact 3.0 × 3.0 mm body and 0.65 mm pitch, distinguishing TSSOP variants, controlling paste, and inspecting every lead.
Read guide →MSOP-10 PCB Footprint: Dimensions, DFM, and Assembly Guide
Create an MSOP-10 footprint with a common 3.0 × 3.0 mm body and 0.5 mm pitch, handling narrow mask webs, thermal-pad variants, reflow, and AOI.
Read guide →MSOP-12 PCB Footprint: Dimensions, DFM, and Assembly Guide
Lay out MSOP-12 with its dense 0.5 mm pitch and common 4.0 × 3.0 mm body, planning escape routing, paste registration, rework access, and parity checks.
Read guide →QFN-16 3×3 mm Footprint: DFM, Layout, and Assembly Guide
Design a 16-pin 3 × 3 mm QFN footprint at 0.5 mm pitch with exact center-pad geometry, windowed paste, thermal vias, escape routing, and X-ray checks.
Read guide →QFN-20 4×4 mm Footprint: DFM, Layout, and Assembly Guide
Build a 20-pin 4 × 4 mm QFN land pattern at 0.5 mm pitch with part-specific terminals, center-pad paste, thermal paths, routing, and hidden-joint checks.
Read guide →QFN-24 4×4 mm Footprint: DFM, Layout, and Assembly Guide
Lay out a 24-pin 4 × 4 mm QFN at 0.5 mm pitch, balancing six terminals per side with center-pad clearance, paste windows, fan-out, and X-ray inspection.
Read guide →QFN-28 5×5 mm Footprint: DFM, Layout, and Assembly Guide
Design a 28-pin 5 × 5 mm QFN footprint at 0.5 mm pitch with seven-pad row alignment, exact exposed-pad geometry, paste segmentation, and thermal review.
Read guide →QFN-32 5×5 mm Footprint: DFM, Layout, and Assembly Guide
Create a 32-pin 5 × 5 mm QFN land pattern at 0.5 mm pitch, resolving eight-pad escapes, center-pad paste, thermal vias, orientation, and X-ray evidence.
Read guide →QFN-48 7×7 mm Footprint: DFM, Layout, and Assembly Guide
Lay out a 48-pin 7 × 7 mm QFN at 0.5 mm pitch with dense fan-out, exact center-pad and thermal-via design, stencil windows, and X-ray validation.
Read guide →TQFP-32 7×7 mm Footprint: DFM, Layout, and Assembly Guide
Design a 32-pin 7 × 7 mm TQFP at 0.8 mm pitch with correct lead span, pin-one orientation, fan-out, stencil alignment, hand rework, and AOI checks.
Read guide →TQFP-44 10×10 mm Footprint: DFM and Assembly Practical Guide
Create a 44-pin 10 × 10 mm TQFP footprint at 0.8 mm pitch, preserving long-row alignment, corner-lead safety, fan-out, paste control, and inspection.
Read guide →LQFP-48 7×7 mm Footprint: DFM, Layout, and Assembly Guide
Lay out a 48-pin 7 × 7 mm LQFP at 0.5 mm pitch with dense fan-out, distributed decoupling, mask capability, lead protection, and AOI planning.
Read guide →LQFP-64 10×10 mm Footprint: DFM and Assembly Practical Guide
Design a 64-pin 10 × 10 mm LQFP at 0.5 mm pitch with sixteen-lead row escape, power-bank decoupling, paste registration, AOI, and parity checks.
Read guide →LQFP-100 14×14 mm Footprint: DFM and Assembly Practical Guide
Create a 100-pin 14 × 14 mm LQFP footprint at 0.5 mm pitch with 25-lead row alignment, multilayer fan-out, decoupling, AOI, and full parity.
Read guide →DFN-6 2×2 mm Footprint: DFM, Layout, and Assembly Guide
Design a 6-pin 2 × 2 mm DFN at 0.65 mm pitch with exact terminal pullback, exposed-pad clearance, paste reduction, thermal vias, and X-ray review.
Read guide →DFN-8 2×2 mm Footprint: DFM, Layout, and Assembly Guide
Lay out an 8-pin 2 × 2 mm DFN at 0.5 mm pitch, managing four-pad rows, terminal pullback, center-paste volume, fine escapes, and hidden-joint checks.
Read guide →DFN-10 3×3 mm Footprint: DFM, Layout, and Assembly Guide
Create a 10-pin 3 × 3 mm DFN at 0.5 mm pitch with accurate terminal and exposed-pad dimensions, windowed paste, thermal routing, and X-ray evidence.
Read guide →DFN-12 4×4 mm Footprint: DFM, Layout, and Assembly Guide
Design a 12-pin 4 × 4 mm DFN at 0.5 mm pitch with six-pad row control, exact exposed-pad geometry, thermal via strategy, stencil windows, and X-ray.
Read guide →SON-6 2×2 mm Footprint: DFM, Layout, and Assembly Guide
Lay out a 6-pin 2 × 2 mm SON at 0.65 mm pitch with exact terminal geometry, center-pad clearance, paste reduction, compact routing, and hidden-joint review.
Read guide →USON-8 2×2 mm Footprint: DFM, Layout, and Assembly Guide
Design an 8-pin 2 × 2 mm USON at 0.5 mm pitch with ultra-small terminal tolerances, exact center pad, stencil registration, escape routing, and X-ray checks.
Read guide →WSON-8 3×3 mm Footprint: DFM, Layout, and Assembly Guide
Create an 8-pin 3 × 3 mm WSON footprint at 0.5 mm pitch with exact side terminals, exposed-pad paste windows, thermal vias, routing, and X-ray evidence.
Read guide →WSON-10 3×3 mm Footprint: DFM, Layout, and Assembly Guide
Lay out a 10-pin 3 × 3 mm WSON at 0.5 mm pitch with five-terminal rows, exact center-pad geometry, paste control, thermal routing, and X-ray review.
Read guide →WSON-16 4×4 mm Footprint: DFM, Layout, and Assembly Guide
Design a 16-pin 4 × 4 mm WSON at 0.5 mm pitch with eight-pad row escape, a part-specific exposed pad, windowed paste, thermal vias, and X-ray checks.
Read guide →WLCSP-9 0.4 mm Footprint: Fan-Out, DFM, and Assembly Guide
Plan a 9-ball WLCSP footprint at 0.4 mm pitch with exact die-size pads, microvia-aware fan-out, mask registration, stencil control, X-ray, and rework limits.
Read guide →WLCSP-16 0.4 mm Footprint: Fan-Out, DFM, and Assembly Guide
Design a 16-ball WLCSP at 0.4 mm pitch with exact revision control, inner-ball microvia escape, pad and mask tolerances, reflow, X-ray, and rework planning.
Read guide →VFBGA-49 0.5 mm Footprint: Fan-Out, DFM, and Assembly Guide
Lay out a 49-ball VFBGA at 0.5 mm pitch with its exact 7 × 7 ball map, HDI escape plan, capture pads, mask strategy, X-ray inspection, and rework limits.
Read guide →TFBGA-64 0.5 mm Footprint: Fan-Out, DFM, and Assembly Guide
Create a 64-ball TFBGA footprint at 0.5 mm pitch with the exact 8 × 8 map, HDI stackup and escape proof, pad geometry, X-ray, and thermal review.
Read guide →BGA-100 0.8 mm Footprint: Fan-Out, DFM, and Assembly Guide
Design a 100-ball BGA at 0.8 mm pitch with an exact 10 × 10 map, dog-bone or via-in-pad escape, plane returns, stencil control, X-ray, and test planning.
Read guide →BGA-121 0.8 mm Footprint: Fan-Out, DFM, and Assembly Guide
Lay out a 121-ball BGA at 0.8 mm pitch with its exact 11 × 11 map, multilayer escape, power distribution, via capability, X-ray, and boundary testing.
Read guide →BGA-256 1.0 mm Footprint: Fan-Out, DFM, and Assembly Guide
Create a 256-ball BGA footprint at 1.0 mm pitch with the exact 16 × 16 map, multilayer fan-out, plane and via planning, X-ray, rework, and test access.
Read guide →SMA DO-214AC Footprint: Dimensions, DFM, and Assembly Guide
Design an SMA diode footprint for its roughly 4.5 × 2.7 mm body, polarized high-current lands, heat spreading, stencil balance, surge paths, and AOI checks.
Read guide →SMB DO-214AA Footprint: Dimensions, DFM, and Assembly Guide
Lay out an SMB diode footprint around its roughly 5.3 × 3.6 mm body, polarized power pads, surge-current routing, thermal copper, paste, and inspection.
Read guide →SMC DO-214AB Footprint: Dimensions, DFM, and Assembly Guide
Create an SMC diode footprint for its roughly 7.0 × 5.9 mm body, high-energy polarized lands, surge routing, thermal mass, stencil process, and AOI.
Read guide →2.54 mm Single-Row Pin Header Footprint and DFM Practical Guide
Design a vertical 2.54 mm single-row header footprint with correct finished holes, square-post tolerance, annular rings, pin-one marking, and mating clearance.
Read guide →2.54 mm Dual-Row Pin Header Footprint and DFM Practical Guide
Lay out a vertical 2.54 mm dual-row header with exact row spacing, plated-hole tolerance, odd-even numbering, shroud clearance, solder access, and fit checks.
Read guide →2.54 mm Right-Angle Pin Header Footprint and DFM Practical Guide
Create a 2.54 mm single-row right-angle header footprint with true bend geometry, finished holes, board-edge setback, ready for package-specific DFM review.
Read guide →2.54 mm 2×5 Box Header Footprint, Keying, and DFM Guide
Design a keyed 2.54 mm 2×5 box header footprint with correct 10-pin numbering, shroud and notch orientation, finished holes, cable clearance, and fit checks.
Read guide →2.00 mm Single-Row Pin Header Footprint and DFM Practical Guide
Lay out a vertical 2.00 mm single-row header with smaller post and hole tolerances, correct annular rings, mating height, pin-one marking, and assembly access.
Read guide →2.00 mm Dual-Row Pin Header Footprint and DFM Practical Guide
Design a 2.00 mm dual-row header footprint with exact row spacing, small-post finished holes, odd-even numbering, ready for package-specific DFM review.
Read guide →2.00 mm Right-Angle Dual-Row Header Footprint Practical Guide
Create a 2.00 mm dual-row right-angle header footprint with true bend offset, small plated holes, mating-axis height, board-edge clearance, and strain controls.
Read guide →1.27 mm Single-Row Pin Header Footprint and DFM Practical Guide
Design a vertical 1.27 mm single-row header with fine post and finished-hole tolerances, annular-ring limits, ready for package-specific DFM review.
Read guide →1.27 mm Dual-Row Pin Header Footprint and DFM Practical Guide
Lay out a vertical 1.27 mm dual-row header with exact row spacing, fine finished holes, view-safe pin numbering, mating envelope, solder process, and fit proof.
Read guide →1.27 mm 2×5 Box Header Footprint, Keying, and DFM Guide
Create a keyed 1.27 mm 2×5 box-header footprint with correct ten-pin map, shroud notch, fine holes and annuli, cable exit, solder access, and mating proof.
Read guide →3.50 mm 2-Pin Screw Terminal Footprint and DFM Practical Guide
Design a 3.50 mm two-position screw terminal footprint with exact lead holes, wire-entry direction, creepage, ready for package-specific DFM review.
Read guide →3.50 mm 3-Pin Screw Terminal Footprint and DFM Practical Guide
Lay out a 3.50 mm three-position terminal block with accurate lead and housing geometry, channel isolation, ready for package-specific DFM review.
Read guide →5.08 mm 2-Pin Screw Terminal Footprint and DFM Practical Guide
Create a 5.08 mm two-position screw terminal footprint with correct rectangular-lead holes, wire entry, ready for package-specific DFM review.
Read guide →5.08 mm 3-Pin Screw Terminal Footprint and DFM Practical Guide
Design a 5.08 mm three-position terminal footprint with exact housing and lead geometry, clear field numbering, creepage, ready for package-specific DFM review.
Read guide →3.81 mm 2-Pin Pluggable Terminal Footprint DFM Practical Guide
Lay out a 3.81 mm two-position pluggable terminal header with exact keying, flange and plug envelope, lead holes, insertion forces, creepage, and mating proof.
Read guide →5.08 mm 3-Pin Pluggable Terminal Footprint DFM Practical Guide
Create a 5.08 mm three-position pluggable terminal header footprint with matched plug keying, full mated envelope, holes, spacing, strain, and load validation.
Read guide →1.00 mm Pitch Castellated Module Footprint and DFM Guide
Design a 1.00 mm-pitch castellated module edge with fab-approved half holes, parent-board lands, paste and fillet access, panel routing, coplanarity, and AOI.
Read guide →1.27 mm Pitch Castellated Module Footprint and DFM Guide
Lay out a 1.27 mm-pitch castellated module with exact half-hole geometry, parent-board toe lands, paste balance, ready for package-specific DFM review.
Read guide →2.00 mm Pitch Castellated Module Footprint and DFM Guide
Create a 2.00 mm-pitch castellated module footprint with robust half holes, parent-board solder lands, ready for package-specific DFM review.
Read guide →2.54 mm Pitch Castellated Module Footprint and DFM Guide
Design a 2.54 mm-pitch castellated daughterboard footprint with large half holes, inspectable parent lands, ready for package-specific DFM review.
Read guide →DIP-8 7.62 mm Footprint: Dimensions, Drills, and Assembly
Design a 7.62 mm-row DIP-8 footprint with 2.54 mm lead pitch, formed-lead finished holes, socket and notch clearance, wave soldering, and pin-one checks.
Read guide →DIP-14 7.62 mm Footprint: Dimensions, Drills, Assembly Guide
Lay out a 300-mil DIP-14 footprint with 2.54 mm pitch, correct formed-lead holes, long-body and socket courtyard, pin-one marking, solder fill, and parity.
Read guide →DIP-16 7.62 mm Footprint: Dimensions, Drills, Assembly Guide
Create a 300-mil DIP-16 land pattern with 2.54 mm pitch, accurate lead holes, long socket clearance, pin-one identity, wave-solder access, and full parity.
Read guide →DIP-28 15.24 mm Footprint: Dimensions, Drills, Assembly
Design a 600-mil DIP-28 footprint with 2.54 mm pitch, wide row spacing, exact socket and lead holes, long-body support, pin-one marking, and solder checks.
Read guide →SOD-123 PCB Footprint: Dimensions, Polarity, and DFM Guide
Design a SOD-123 diode footprint around its roughly 3.7 × 1.8 mm body, cathode marking, end-terminal lands, surge routing, paste balance, and AOI checks.
Read guide →SOD-323 PCB Footprint: Dimensions, Polarity, and DFM Guide
Lay out a compact SOD-323 diode footprint for its roughly 2.5 × 1.25 mm body, tiny polarized terminals, reflow balance, protection-loop placement, and AOI.
Read guide →SOD-523 PCB Footprint: Dimensions, Polarity, and DFM Guide
Create a tiny SOD-523 diode footprint around its roughly 1.6 × 0.8 mm body, minute cathode marking, paste control, ESD placement, rework limits, and AOI.
Read guide →DPAK TO-252 Footprint: Thermal Layout, DFM, and Assembly
Design a DPAK/TO-252 footprint with exact tab net and lead geometry, high-current copper, thermal vias, segmented paste, clearance, X-ray, and load testing.
Read guide →D2PAK TO-263 Footprint: Thermal Layout, DFM, Assembly Guide
Lay out a D2PAK/TO-263 power footprint with its large live tab, high-current leads, heavy copper and thermal vias, ready for package-specific DFM review.
Read guide →Manufacturing & fabrication intents
60 guidesPCB Manufacturing for Wearable Electronics: Practical Guide
Plan wearable PCB fabrication around thin rigid boards, skin-side height, battery safety, flex strain, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for IoT Sensor Nodes: DFM and Assembly
Manufacture an IoT sensor-node PCB with honest power, radio, sensor-exposure, connector, coating, programming, assembly, and first-article test decisions.
Read guide →PCB Manufacturing for LED Controllers: Power and DFM Guide
Build an LED-controller PCB around real current, connector heat, PWM returns, copper temperature rise, driver cooling, assembly, fusing, and load validation.
Read guide →PCB Manufacturing for Motor Driver Prototypes: DFM Guide
Manufacture a motor-driver prototype with measured stall current, compact switching loops, gate control, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Audio Interfaces: Noise and DFM Guide
Plan audio-interface PCB fabrication around gain structure, quiet returns, codec clocks, connector mechanics, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for RF Beacons: Stackup and DFM Guide
Manufacture an RF beacon with a fixed stackup, antenna keepout, controlled feed, clean supply, low-power programming, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Robotics Controllers: DFM Practical Guide
Build a robotics-controller PCB around mixed logic and load power, robust connectors, motor noise, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for E-Ink Badges: Low-Power DFM Guide
Manufacture an e-ink badge PCB around display connector fragility, update-current peaks, deep sleep, thin mechanics, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Macropads and Keyboards: DFM Guide
Plan macropad PCB manufacturing around switch geometry, plate and case fit, diode orientation, USB-C protection, matrix testing, hot-swap sockets, and assembly.
Read guide →PCB Manufacturing for USB Gadgets: USB-C and DFM Practical Guide
Manufacture a USB gadget PCB with correct USB-C CC resistors, ESD placement, differential routing, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Environmental Monitors: DFM Guide
Build an environmental-monitor PCB with sensor airflow, thermal isolation, contamination control, low-power radio, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Soil Sensors: Corrosion and DFM Guide
Plan soil-sensor PCB manufacturing around electrode corrosion, moisture barriers, cable strain, low-leakage, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Smart-Home Hubs: DFM and Test Guide
Manufacture a smart-home hub PCB with radio coexistence, stable power, Ethernet or USB, antenna and enclosure, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Battery Trackers: Low-Power DFM Guide
Build a battery tracker PCB around radio current peaks, sleep leakage, cell protection, connector polarity, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Data Loggers: Storage and DFM Guide
Manufacture a data-logger PCB with robust power-fail behavior, sensor inputs, removable storage, RTC backup, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Drone Peripherals: DFM and Test Guide
Plan a drone-peripheral PCB around mass, vibration, power transients, connector retention, sensor orientation, EMI, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Industrial Sensors: DFM and Test Guide
Build an industrial-sensor PCB with protected field wiring, 24 V tolerance, isolation decisions, EMC layout, coating, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for CAN Bus Nodes: Layout and DFM Guide
Manufacture a CAN node with controlled connector pinout, short transceiver stubs, termination options, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for RS-485 Nodes: Layout and DFM Guide
Build an RS-485 node PCB with correct A/B labeling, termination and bias options, surge protection, isolation decisions, grounded returns, and long-cable tests.
Read guide →PCB Manufacturing for Solar Charger Controllers: DFM Guide
Plan a solar-charge controller PCB around panel and battery faults, converter loops, heat, current sensing, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for MIDI Controllers: DFM and Test Guide
Manufacture a MIDI controller PCB with USB or DIN protection, control scanning, LED current, quiet analog inputs, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Synth Controllers: Analog DFM Guide
Build a synthesizer-control PCB with clean analog rails, calibrated CV inputs and outputs, panel-aligned controls, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Test Fixtures: Durability and DFM Guide
Manufacture a PCB test fixture around pogo access, alignment pins, replaceable wear parts, protected instruments, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Electronics Education Kits: DFM Guide
Plan an education-kit PCB for visible circuits, forgiving footprints, safe power, durable connectors, clear polarity, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Power Supplies: Thermal and DFM Guide
Build a low-voltage power-supply PCB with controlled hot loops, copper and magnetic thermal design, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Relay Controllers: DFM and Safety Guide
Manufacture a relay-controller PCB with coil suppression, contact spacing, terminal mechanics, logic separation, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Camera Triggers: Low-Leakage DFM Guide
Build a camera-trigger PCB with model-safe interfaces, galvanic or transistor isolation, low leakage, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Compact IoT Nodes: Density DFM Guide
Manufacture a compact IoT node with deliberate stackup, fine-pitch fan-out, antenna and sensor keepouts, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Analog Controllers: Precision DFM Guide
Plan an analog-controller PCB around reference accuracy, low-leakage inputs, grounding, thermal gradients, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Surge Protection Boards: DFM Guide
Build a surge-protection PCB with short discharge paths, correct TVS and fuse energy, domain spacing, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for Retro Computing Boards: DFM Guide
Manufacture a retro-computing PCB with verified legacy pinouts, socket geometry, bus integrity, level compatibility, decoupling, test ROMs, and repair access.
Read guide →PCB Manufacturing for Thermal Controllers: DFM and Test Guide
Build a thermal-controller PCB with accurate sensing, heater fault containment, current and connector sizing, ready for fabrication-specific DFM review.
Read guide →PCB Manufacturing for GNSS Receivers: RF and DFM Practical Guide
Manufacture a GNSS receiver PCB with antenna and LNA layout, clean power, fixed stackup, timing signals, module reflow, enclosure tuning, and cold-start tests.
Read guide →PCB Manufacturing for PoE Sensor Nodes: Power and DFM Guide
Plan a PoE sensor PCB around classification, isolation, magnetics, creepage, surge paths, Ethernet impedance, converter heat, assembly, and powered-link tests.
Read guide →PCB Manufacturing for FPGA Control Boards: DFM Practical Guide
Manufacture an FPGA control PCB with proven BGA fan-out, power rails and sequencing, configuration recovery, impedance stackup, X-ray, and boundary-scan tests.
Read guide →PCB Manufacturing for Raspberry Pi HATs: DFM and Fit Guide
Build a Raspberry Pi HAT PCB with correct 40-pin mapping, mechanical keepouts, EEPROM and power rules, stacking height, connector assembly, and fit validation.
Read guide →2-Layer PCB Manufacturing: Stackup, DFM, and Tradeoffs Guide
Use a two-layer PCB deliberately with a planned ground return, practical routing density, copper balance, ready for fabrication-specific DFM review.
Read guide →4-Layer PCB Manufacturing: Stackup, DFM, and Tradeoffs Guide
Plan a four-layer PCB with an actual fab stackup, continuous reference planes, sensible power distribution, ready for fabrication-specific DFM review.
Read guide →6-Layer PCB Manufacturing: Stackup, HDI, and DFM Practical Guide
Design a six-layer PCB from a quoted stackup with paired references, BGA fan-out, via and lamination limits, ready for fabrication-specific DFM review.
Read guide →1 oz Copper PCB Manufacturing: Thickness, DFM, and Limits
Use 1 oz PCB copper with realistic finished-thickness tolerance, trace-temperature and voltage-drop calculations, ready for fabrication-specific DFM review.
Read guide →2 oz Copper PCB Manufacturing: Current, DFM, and Tradeoffs
Specify 2 oz PCB copper only after current and heat calculations, with finished-thickness evidence, ready for fabrication-specific DFM review.
Read guide →Heavy Copper PCB Manufacturing: DFM, Thermal, and Limits
Plan heavy-copper PCB fabrication around real current, heat, etch, and lamination limits, with per-layer copper callouts, large geometry, and load proof.
Read guide →ENIG PCB Finish: Manufacturing, DFM, and When to Use It
Choose ENIG PCB finish for pad planarity, fine pitch, shelf life, contacts, and assembly while checking nickel/gold thickness, cost, limits, and inspection.
Read guide →Lead-Free HASL PCB Finish: DFM, Cost, and Limitations Guide
Use lead-free HASL with honest expectations for solderability, surface flatness, fine-pitch limits, thermal exposure, ready for fabrication-specific DFM review.
Read guide →ENIG vs Lead-Free HASL: PCB Finish Tradeoff Practical Guide
Compare ENIG and lead-free HASL by pad flatness, fine-pitch yield, solderability, storage, contact use, ready for fabrication-specific DFM review.
Read guide →Castellated PCB Manufacturing: Half-Hole DFM and Assembly
Manufacture castellated PCBs with fab-approved plated half holes, routed-edge geometry, panel support, parent lands, ready for fabrication-specific DFM review.
Read guide →Flexible PCB Manufacturing Basics: Stackup, Bend, and DFM
Design a flex PCB from a real bend requirement with rolled copper, coverlay geometry, stiffeners, ready for fabrication-specific DFM review.
Read guide →Rigid-Flex PCB Manufacturing Basics: Stackup and DFM Guide
Plan a rigid-flex PCB with one qualified stackup, flex transition rules, controlled bend, via and copper, ready for fabrication-specific DFM review.
Read guide →Controlled-Impedance PCB Manufacturing: Stackup and DFM
Specify controlled impedance from the real stackup, material, copper, mask, trace geometry and tolerance, ready for fabrication-specific DFM review.
Read guide →Via-in-Pad PCB Manufacturing: Filled Vias, DFM, and Cost
Use via-in-pad only with a specified fill, plate and planarization process, exact BGA or thermal geometry, ready for fabrication-specific DFM review.
Read guide →High-Density PCB Manufacturing: HDI Stackup and DFM Guide
Plan an HDI PCB from actual package escape and layer needs, with laser microvias, buildup stack, capture pads, ready for fabrication-specific DFM review.
Read guide →Small PCB Panelization: Rails, Tabs, V-Scores, and DFM Guide
Panelize small PCBs with assembly rails, fiducials, tooling holes, routing or V-scores, copper and component edge, ready for fabrication-specific DFM review.
Read guide →Aluminum-Core PCB Manufacturing: Thermal DFM and Limits
Design an aluminum-core PCB for measured heat flow with dielectric thermal limits, single-layer routing constraints, ready for fabrication-specific DFM review.
Read guide →High-Tg PCB Manufacturing: Material Selection and DFM Guide
Specify high-Tg PCB material for real reflow, temperature, thickness, and reliability needs while checking Td, CTE, ready for fabrication-specific DFM review.
Read guide →JLCPCB for Prototype PCBs: Capabilities and DFM Practical Guide
Assess JLCPCB for prototype boards using its current quote and capability profile, while controlling stackup, finish, ready for fabrication-specific DFM review.
Read guide →PCBWay for Flex PCB Prototypes: Capabilities and DFM Guide
Assess PCBWay for flex prototypes using current polyimide, coverlay, stiffener, copper, finish, and assembly options while freezing bend and stackup data.
Read guide →OSH Park for 2-Layer Prototype PCBs: Fit and DFM Practical Guide
Assess OSH Park's U.S.-made purple two-layer prototype service with its fixed stackup, ENIG, order multiples, ready for fabrication-specific DFM review.
Read guide →AISLER for European PCB Assembly: Fit and DFM Practical Guide
Assess AISLER for European prototype assembly using native CAD and project previews while controlling board options, BOM, substitutions, placement, and tests.
Read guide →Eurocircuits for Impedance-Controlled PCB Prototypes Guide
Assess Eurocircuits for controlled-impedance prototypes using its defined stackups, calculator, pooling and assembly, ready for fabrication-specific DFM review.
Read guide →MacroFab for Assembled PCB Prototypes: Fit and DFM Guide
Assess MacroFab for turnkey assembled prototypes through its digital quoting, sourcing, revision and order tracking, ready for fabrication-specific DFM review.
Read guide →Vibecode AI hardware guides
50 guidesVibecode a Macropad PCB with AI: Gated Board Design Guide
Vibecode a macropad board by defining switch matrix, diodes, USB or module interface, RGB current, mechanics, and tests—then review every gated artifact.
Read guide →Vibecode an Environmental Sensor PCB with AI and Gate Checks
Generate an environmental-sensor carrier only from supported sensor interfaces and blocks, with airflow, self-heating, ready for explicit human gate review.
Read guide →Vibecode an LED Controller PCB with AI: Power and Gates
Vibecode a low-voltage LED controller only after defining channel current, driver topology, connector and thermal limits, ready for explicit human gate review.
Read guide →Vibecode an LED Matrix PCB with AI: Current and Gate Guide
Generate a small LED-matrix controller only with explicit scan topology, peak and average current, driver blocks, ready for explicit human gate review.
Read guide →Vibecode a USB Gadget PCB with AI: USB-C and Gate Checks
Vibecode a USB gadget only after fixing device role, speed, connector, CC network, ESD, current and firmware path, ready for explicit human gate review.
Read guide →Vibecode a Smart Button PCB with AI: Low-Power Gate Guide
Generate a smart-button carrier by specifying switch mechanics, wake and debounce, low-power module, status output, ready for explicit human gate review.
Read guide →Vibecode a Soil Sensor PCB with AI: Corrosion and Gates
Generate a soil-sensor carrier only after defining electrode method, excitation, leakage, moisture boundary, cable, ready for explicit human gate review.
Read guide →Vibecode an Air Quality Monitor PCB with AI and Gate Checks
Generate an air-quality monitor carrier by fixing sensor MPNs, heater and fan current, airflow, self-heating, power, ready for explicit human gate review.
Read guide →Vibecode a Water Leak Detector PCB with AI and Gate Checks
Generate a water-leak detector only with a defined probe, low-corrosion excitation, leakage path, cable, alarm, power, ready for explicit human gate review.
Read guide →Vibecode a Temperature Logger PCB with AI and Gate Checks
Generate a temperature-logger carrier by defining sensor accuracy, placement, sample rate, storage, RTC, power loss, ready for explicit human gate review.
Read guide →Vibecode an E-Ink Dashboard PCB with AI and Gate Checks
Generate an e-ink dashboard carrier only after fixing display and FPC, update power, SPI timing, sleep leakage, controls, ready for explicit human gate review.
Read guide →Vibecode an Audio Level Meter PCB with AI and Gate Checks
Generate an audio-level meter only from verified analog and display blocks, with input range, protection, bias, filtering, ready for explicit human gate review.
Read guide →Vibecode a Battery Monitor PCB with AI: Limits and Gates
Generate a battery-monitor carrier only with known chemistry, voltage and fault limits, verified divider or gauge blocks, ready for explicit human gate review.
Read guide →Vibecode a Current Monitor PCB with AI: Kelvin Gate Guide
Generate a current-monitor board after defining range, common mode, shunt loss, Kelvin routing, fault energy, ADC accuracy, connectors, gates, and load tests.
Read guide →Vibecode a Power Monitor PCB with AI: Accuracy and Gates
Generate a low-voltage power monitor only with explicit voltage, current, shunt, sampling and energy-accumulation, ready for explicit human gate review.
Read guide →Vibecode a USB Power Monitor PCB with AI and Gate Checks
Generate a USB power monitor only after fixing connector roles, current direction and range, USB-C CC behavior, ready for explicit human gate review.
Read guide →Vibecode a Debug Adapter PCB with AI: Pinout Gate Guide
Generate a debug adapter only with exact host and target pinouts, voltage and direction rules, keying, protection, ready for explicit human gate review.
Read guide →Vibecode a Prototyping Breakout PCB with AI and Gate Checks
Generate a breakout only with exact module and connector pinouts, voltage domains, breadboard or header mechanics, ready for explicit human gate review.
Read guide →Vibecode a Rotary Controller PCB with AI and Gate Checks
Generate a rotary-controller board by defining encoder type, detents, switch, debounce, LED ring current, panel mechanics, ready for explicit human gate review.
Read guide →Vibecode a Game Controller PCB with AI and Gate Checks Guide
Generate a wired game-controller carrier only with exact buttons, axes, USB/HID block, debounce, ESD, mechanics, power, gate checks, and latency/input tests.
Read guide →Vibecode a Camera Trigger PCB with AI and Gate Checks Guide
Generate a camera-trigger board only with the exact camera/cable pinout, isolated or transistor outputs, ready for explicit human gate review.
Read guide →Vibecode an Analog Control Panel PCB with AI and Gate Checks
Generate an analog control-panel carrier only with exact potentiometers and controls, ADC range and reference, filtering, ready for explicit human gate review.
Read guide →Vibecode a Lab Control Panel PCB with AI and Gate Checks
Generate a low-voltage lab control panel only with defined controls, displays, interlocks, connector and panel mechanics, ready for explicit human gate review.
Read guide →Vibecode a Multi-Sensor Hub PCB with AI and Gate Checks
Generate a multi-sensor hub only after resolving exact modules, I²C addresses, voltage and pull-ups, connector keying, ready for explicit human gate review.
Read guide →Vibecode a MIDI Controller PCB with AI and Gate Checks Guide
Generate a MIDI controller carrier only with exact USB or DIN interface blocks, controls, scanning and LED power, ready for explicit human gate review.
Read guide →Vibecode a Synth Control Surface PCB with AI and Gate Checks
Generate a synth control surface only with defined CV ranges, precision analogue blocks, controls and jacks, panel datum, ready for explicit human gate review.
Read guide →Vibecode an RS-485 Sensor Node PCB with AI and Gate Checks
Generate an RS-485 sensor node only with exact transceiver, A/B convention, bias and termination options, protection, ready for explicit human gate review.
Read guide →Vibecode a CAN Bus Node PCB with AI and Gate Checks Guide
Generate a CAN node only with named transceiver, CAN version and rate, termination, protection, common-mode and isolation, ready for explicit human gate review.
Read guide →Vibecode a Relay Controller PCB with AI: Limits and Gates
Generate a relay controller only for bounded low-voltage loads with exact relay, driver, flyback, terminal, ready for explicit human gate review.
Read guide →Vibecode a Robot Sensor Hub PCB with AI and Gate Checks
Generate a robot sensor hub only with exact low-speed sensor modules, power and connector budgets, address resolution, ready for explicit human gate review.
Read guide →Vibecode a Thermal Controller PCB with AI: Safety Limits
Understand why MakeIRL refuses autonomous heater control, and how to specify sensor accuracy, independent cutoff, ready for explicit human gate review.
Read guide →Vibecode a Solar Monitor PCB with AI: Scope and Gate Checks
Generate only a bounded low-voltage solar monitor with known panel and load limits, verified sensing blocks, protection, ready for explicit human gate review.
Read guide →Vibecode a Surge Monitor PCB with AI: Refusal and Limits
MakeIRL refuses high-energy surge hardware; a low-voltage event logger still needs bounded inputs, isolation, verified blocks, gate review, and lab tests.
Read guide →Vibecode a Power Distribution Monitor: AI Scope Limits Guide
Generate only a ≤12 V, ≤2 A monitor; higher-current distribution, switching and protection need engineered bus, fuse, ready for explicit human gate review.
Read guide →Vibecode a BLE Remote PCB with AI: RF Refusal Design Guide
MakeIRL refuses BLE and battery hardware today; a future module carrier still needs antenna keepout, low-power inputs, gate review, and measured RF tests.
Read guide →Vibecode an NFC Tag Reader PCB with AI: RF Limits Guide
MakeIRL refuses NFC antenna and RF matching design; a future verified reader-module carrier still needs power, host interface, mechanics, gates, and RF tests.
Read guide →Generate a Radio Module Carrier with AI: Refusal Design Guide
Understand MakeIRL's RF refusal: even a module carrier needs exact certification scope, antenna keepout, power peaks, ready for explicit human gate review.
Read guide →Vibecode a Drone Telemetry Adapter: AI Scope Limits Guide
MakeIRL refuses RF and flight-critical drone telemetry; a bounded wired UART adapter still needs exact pinouts, power, protection, gate review, and bench tests.
Read guide →Vibecode a GNSS Logger PCB with AI: RF Refusal Design Guide
MakeIRL refuses GNSS/RF and battery design today; a future verified receiver carrier still needs antenna, storage, power, gate review, and measured tests.
Read guide →Vibecode a Wearable Sensor PCB with AI: Scope and Gates
Generate only a USB-powered wired wearable-sensor carrier; battery, BLE, body measurement, flex, and safety claims need verified blocks and physical evidence.
Read guide →Vibecode a Status Light PCB with AI: Current and Gate Checks
Generate a low-current status-light carrier with explicit LED color and Vf, resistor and GPIO limits, connector, ready for explicit human gate review.
Read guide →Vibecode a High-I/O Controller PCB: AI Refusal Design Guide
Learn why MakeIRL refuses high-I/O and dense BGA controller design: fan-out, bank voltages, stackup, power integrity, ready for explicit human gate review.
Read guide →Generate an FPGA Control Carrier with AI: Refusal Guide
Understand why FPGA carriers exceed MakeIRL's current scope: BGA fan-out, configuration, clocks, bank rails, ready for explicit human gate review.
Read guide →Generate a Voltage Regulator Carrier with AI: Scope Guide
Generate only a bounded linear-regulator carrier with exact input, output, load, dropout, heat and capacitor data, ready for explicit human gate review.
Read guide →Generate an ESP32-C3 Carrier with AI: Current V2 Design Guide
Use MakeIRL's checked ESP32-C3, USB-C power and Qwiic/status blocks to create a gated review candidate—never autonomous fab or a physically verified board.
Read guide →Generate an RP2040 Carrier Board with AI: Scope and Gates
Plan a future RP2040 carrier from an exact verified block with flash, crystal or clock, USB, boot/reset, ready for explicit human gate review.
Read guide →Generate an RP2350 Carrier Board with AI: Scope and Gates
Plan a future RP2350 carrier only from an exact package and verified flash, power, clock, USB, boot and security block; current V2 cannot invent or validate it.
Read guide →Generate an STM32G0 Carrier Board with AI: Scope Design Guide
Plan an STM32G0 carrier only after selecting an exact MPN/package and verified power, clock, reset/boot, SWD, ready for explicit human gate review.
Read guide →Generate a Seeed XIAO Carrier with AI: Scope and Gate Checks
Plan a XIAO module carrier with exact variant pin map, USB and battery boundary, castellated headers, antenna keepout, ready for explicit human gate review.
Read guide →Generate a Raspberry Pi Pico Carrier with AI: Scope Guide
Plan a Pico or Pico W carrier using the exact module footprint and pin map, power/backfeed rules, USB access, ready for explicit human gate review.
Read guide →