makeIRLPCB engineering field guide

Parts, connectors & sensors

Adding Analog Devices DS18B20+ to a PCB: layout and gate checks

Add Analog Devices DS18B20+ to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.

Practical PCB integration · KiCad 9 · Manufacturing gate

Define the exact Analog Devices DS18B20+ before drawing the footprint

The Analog Devices DS18B20+ is a 1-Wire digital temperature sensor from Analog Devices. Its package or board interface is 3-lead TO-92 for DS18B20+; other suffixes use different packages, and its relevant electrical envelope is 3.0–5.5 V, or parasite power with constraints. It communicates or connects through 1-Wire open-drain with unique 64-bit ID. Those fields belong together: substituting a familiar family name while changing package, voltage, sensing port, mount style, current class, or interface behavior can leave a PCB that passes ordinary net checks and still cannot be assembled or function safely.

DS18B20 supports long multi-drop 1-Wire networks and selectable resolution, but cable capacitance, pull-up strength, and genuine-device sourcing determine reliability.

Common uses include remote cable temperature probes and multi-drop thermal monitoring. Start with the manufacturer drawing and recommended application, then record the exact ordering suffix alongside the KiCad symbol and footprint. This makes the library evidence reviewable when the part is re-sourced months later.

PartAnalog Devices DS18B20+
ManufacturerAnalog Devices
Function1-Wire digital temperature sensor
Package3-lead TO-92 for DS18B20+; other suffixes use different packages
Electrical3.0–5.5 V, or parasite power with constraints
Interface1-Wire open-drain with unique 64-bit ID
Typical use 1remote cable temperature probes
Typical use 2multi-drop thermal monitoring

Footprint, placement, and support circuitry

  • Use the sensor maker's land pattern and paste guidance for the exact LGA/DFN package. Keep copper, solder mask, and cleaning residue away from any pressure, humidity, or thermal opening called out in the package drawing.
  • Give the package a courtyard that protects its sensing port and allows rework. Do not place a via, glue dot, conformal coating, or enclosure rib over the opening.

Use local VDD when possible, size the pull-up for cable and device count, add connector protection, and provide the strong pull-up needed for parasite-powered conversions if that mode is unavoidable.

  • Place the sensor away from regulators, processors, batteries, displays, and board-edge drafts unless those are the intended measurement. Use a thermal neck or isolated board region when ambient temperature accuracy matters.
  • Decouple at the supply pin, keep digital pull-ups within the allowed I/O voltage, and follow the datasheet's startup, heater, and measurement timing. Vent the enclosure so the sensor sees the medium without admitting liquid water or assembly contamination.

Put the support components where their current, thermal, optical, RF, or measurement loops are actually short—not merely where ratsnest lines look tidy. Confirm pin one from the package view used in the datasheet, distinguish top view from mating face or bottom view, and check mask, paste, drill, courtyard, enclosure, and rework access independently. A correct copper pad pattern can still be a bad production footprint when the sensing opening, connector latch, exposed pad, thermal path, or cable volume is wrong.

Gate checks that matter for Analog Devices DS18B20+

MakeIRL’s release gate should not stop at “the symbol has the right number of pins.” For this part, a useful gate review combines ERC/DRC with the following package- and function-specific evidence:

  1. Check package orientation, exposed-port keepout, supply and I/O ranges, local decoupling, I²C/SPI address straps, pull-up rail, and any mandatory no-connect pads.
  2. Check that heat sources, copper pours, airflow, coating, adhesive, and enclosure features do not bias or block the measurement.
  3. Check the exact orderable suffix, accuracy grade, package, address, and lifecycle rather than treating a breakout-board name as the component MPN.
  4. For Analog Devices DS18B20+, check TO-92 pin order from the flat-face view, VDD/parasite mode, pull-up, cable ESD, connector polarity, conversion current, and CRC handling.

Then run ERC and DRC, refill zones, and inspect the fabrication and assembly outputs. Cross-probe the exact pads named by any finding, compare the BOM MPN with the footprint and electrical limits above, and verify that a real cable, enclosure, antenna, sensor stimulus, load, or thermal path can be tested on the assembled unit. An exclusion is evidence that someone dismissed a marker; it is not evidence that the underlying condition was resolved.

Mistakes, alternates, and sourcing

The most expensive errors are usually plausible: a footprint from a sibling package, a breakout-board voltage copied to the bare IC, a headline current used without thermal analysis, or a connector family selected by pitch alone. For Analog Devices DS18B20+, review these failure modes explicitly:

  • Many TO-92 temperature sensors use different pin orders; assuming 1-GND, 2-DQ, 3-VDD from a generic outline can reverse power.
  • Placing the sensor beside an LDO or radio and calibrating out a self-heating error that changes with workload and battery voltage.
  • Washing or conformally coating a humidity or pressure port, permanently changing response or blocking it.

Sourcing note. Counterfeit DS18B20s are common; use the complete DS18B20+ MPN from an authorized Analog Devices channel or qualify probes rigorously. The approved vendor list should preserve manufacturer, full suffix, package, voltage/range/accuracy grade, lifecycle, and mating or external components. An alternate is real only after its datasheet, land pattern, electrical behavior, firmware assumptions, and assembly process have all been compared—not because a distributor search places it in the same parametric row.

Check the design before fabrication

Run the release gate on the KiCad project that uses Analog Devices DS18B20+.

Check a KiCad project