Package footprints & DFM
WLCSP-9 0.4 mm Footprint: Fan-Out, DFM, and Assembly Guide
Plan a 9-ball WLCSP footprint at 0.4 mm pitch with exact die-size pads, microvia-aware fan-out, mask registration, stencil control, X-ray, and rework limits.
Practical PCB integration · KiCad 9 · Manufacturing gate
Get the exact WLCSP-9 0.4 mm land pattern right before routing
WLCSP-9 0.4 mm is a area array package used for surface mount assembly, also seen labeled 9-ball wafer-level CSP, 3 × 3 WLCSP array. A dependable footprint follows the exact orderable-device drawing rather than the family name: nominal body Die-sized; often roughly 1.0–1.5 mm square, overall span Same as the silicon/package outline, seated height Often below 0.6 mm, pitch 0.4 mm, pin count Up to 9 balls in a 3 × 3 map; depopulation is part-specific, and exposed pad No separate exposed pad; all connections are balls.
Use the exact package revision's ball map, ball diameter, and die outline; WLCSP dimensions can change with silicon revision.
Typical uses include tiny sensors, mobile power ICs, ultra-compact logic. WLCSP is die-specific by nature; no generic 9-ball footprint should replace the package drawing for the exact revision.
| Package | WLCSP-9 0.4 mm |
|---|---|
| Aliases | 9-ball wafer-level CSP, 3 × 3 WLCSP array |
| Family | area-array |
| Mounting | surface-mount |
| Body | Die-sized; often roughly 1.0–1.5 mm square |
| Overall | Same as the silicon/package outline |
| Height | Often below 0.6 mm |
| Pitch | 0.4 mm |
| Pins | Up to 9 balls in a 3 × 3 map; depopulation is part-specific |
| Exposed pad | No separate exposed pad; all connections are balls |
Geometry, layout, and hand-solder reality
- A nominal 3 × 3 array may omit balls or use a die outline only slightly larger than the 0.8 mm center-to-center span across corner balls.
- Ball count and pitch do not uniquely define an area-array footprint; the ball map, missing positions, body size, ball diameter, and package substrate are part-specific.
Prove whether the center ball can escape on the chosen stackup; 0.4 mm pitch often drives laser microvias or via-in-pad rather than ordinary drills.
- Plan fan-out, via technology, reference planes, and escape channels before committing the stackup; a completed schematic does not prove the array can be routed.
Hand assembly is rated expert-only. High-accuracy stencil, reflow, and X-ray-capable professional assembly. Watch for die revision size changes, pad cratering, and unrouteable center balls.
DFM, inspection, and common mistakes
- Lock the exact MPN revision and obtain assembly limits for pad finish, stencil thickness, placement accuracy, and underfill if mechanical stress requires it.
- Get written confirmation for minimum capture pads, mask registration, via structure, and X-ray expectations on the quoted stackup.
- Keep silkscreen and test pads outside the package while reserving space for rework heating and inspection coupons when risk warrants them.
Inspection focus:
- Use X-ray and functional rail/interface tests; the die has no visible fillets and rework cycles can damage the laminate or neighboring parts.
- Joints are hidden. X-ray, boundary scan where available, power-rail checks, and a deliberate bring-up sequence replace ordinary visual fillet inspection.
Common mistakes:
- Assuming every silicon revision preserves the WLCSP outline can leave a production alternate with balls partly or entirely off pad.
- Do not route an area array before validating the actual ball map and proving that the selected via/stackup process can escape every required net.
Selection checklist and gate checks for WLCSP-9 0.4 mm
- Before approving WLCSP-9 0.4 mm, compare the exact orderable-device drawing with the library item: body range (Die-sized; often roughly 1.0–1.5 mm square), terminal or lead span (Same as the silicon/package outline), pitch (0.4 mm), pin count (Up to 9 balls in a 3 × 3 map; depopulation is part-specific), height (Often below 0.6 mm), and exposed-pad definition (No separate exposed pad; all connections are balls). Record the source drawing revision and every intentional courtyard, toe, heel, side, mask, or paste adjustment.
- Treat the expert-only hand-solder rating as a prototype-planning input, not proof of production yield. Review die revision size changes, pad cratering, and unrouteable center balls with the assembler, confirm that high-accuracy stencil, reflow, and x-ray-capable professional assembly is compatible with the build, and require the S1 connectivity gate plus relevant S2 geometry checks to pass against the released footprint and selected fabrication profile.
Manufacturing gate checks:
- S1Pad count, numbering, and schematic parity. Exact ball map, die revision, 0.4 mm pad geometry, microvia capability, and schematic mapping must be locked before release.
- S1Ball-map parity and escape feasibility. A mirrored, rotated, missing, or unreachable ball can survive ordinary visual review and make the assembled device unusable.
- S2Courtyard and body clearance. The body, leads, placement tolerance, rework access, and nearby height limits all belong in the manufacturing review.
Check the design before fabrication
Run the release gate and inspect the WLCSP-9 0.4 mm footprint before fabrication.
Check a KiCad project→