Vibecode a Wearable Sensor PCB with AI: Scope and Gates

MakeIRL's generator treats a wearable sensor prompt as a self-contained project board. Current status: needs clarification.

A USB-powered carrier for an external low-speed sensor can fit. BLE, batteries, charging, biosignal/medical claims, flex mechanics, and body-worn validation are refused or require unsupported evidence.

MakeIRL V2 extracts a strict CarrierSpec from the prompt, applies a deterministic scope policy, resolves only cataloged blocks, composes deterministic connectivity and exact-MPN BOM data, emits KiCad artifacts, and runs the manufacturing gate. The language model does not invent pins, topology, parts, placement, routing, or substitutions.

1. Non-medical sensor/module MPN, interface, measurement range, placement, skin/environment exposure, accuracy, and calibration
2. Wired versus RF, power source, peak/sleep current, connector, ESD, coating, firmware, and data handling
3. Body location, enclosure/strap, board thickness and edges, sweat/condensation, flex/strain, mounting, and test population

Block plan:

• Current checked ESP32-C3 carrier for a wired demo only
• Current checked USB-C power and Qwiic/status blocks
• No battery, radio-use claim, biosignal electrode, flex, or medical sensor block

Interfaces: external I²C/Qwiic, GPIO status, wired service/programming. Power plan: USB-only during current scope; battery, charging, radio-use power budget, and body-safe isolation are not generated.

• Round and smooth the mechanical outline, keep connector/user ESD paths controlled, place the external sensor opening correctly, and avoid pressure points.
• Freeze the board outline, mounting holes, connector faces, component height zones, test access, and keepouts before evaluating generated placement or routing.

Gate checks:

1. S1Generated connectivity and schematic parity. Verify the current blocks and statuses, USB CC/ESD, Qwiic voltage/pinout/pull-ups, rounded outline/edge clearance, current budget, and no battery/electrode nets.
2. S1Catalog and exact-MPN provenance. Every wearable sensor block, footprint, pin map, required companion, BOM line, and block-status claim must resolve to the pinned catalog version; the prompt cannot create missing hardware.
3. S2PCB DRC, fabrication profile, and release identity. Run KiCad DRC and schematic parity, compare geometry with one quoted fab profile, regenerate Gerbers/drills/BOM/CPL from the approved revision, and inspect both local and supplier previews.

• Review skin/contact materials, sweat ingress, flex and strain, enclosure pressure, sensor validity on-body, privacy, radio certification, battery safety, and medical boundaries.
• A reviewer must check primary datasheets, exact symbol-to-footprint mapping, power and protection, return paths, connector orientation, mechanical fit, test coverage, and every gate waiver before release.

Failure modes:

• A rigid PCB that works on a desk can crack joints on a flexing strap, and a sensor can become biased by body heat, sweat, pressure, or poor airflow.
• ERC and DRC can prove encoded consistency but cannot prove requirements, component source truth, analogue stability, RF/EMI, thermal margin, firmware, safety, compliance, or delivered product function.

Validation plan:

• Validate the wired non-medical carrier: fit, edge comfort, flex/drop, sweat/condensation protection, sensor comparison, current, ESD, and cable strain.
• Bring up first articles with current limiting, measure every rail before fitting expensive modules, program minimal test firmware, exercise every interface and fault assumption, and retain measurements against the released revision.

• Refuse medical/biosignal claims, electrodes, batteries/charging, RF use, implant/contact safety, or flex generation.
• A wearable form factor does not make a generated environmental carrier medically meaningful or physically verified.

The intended carrier envelope is 2-layer FR-4, at most 100 × 100 mm, at most 40 BOM lines, at most 12 V SELV and 2 A, with cataloged modules and low-speed I²C, UART, GPIO, slow SPI, or power-only USB-C connections. The current catalog is narrower than that intended envelope.

Deterministic policy refuses unsupported or hazardous requests, including mains, motors, lithium charging, RF design, switch-mode power, high-speed buses, excessive size/current, and unknown modules. A refusal is a safety and truthfulness result, not a failed attempt to improvise a circuit.

The current seed catalog contains ESP32-C3 carrier, USB-C power, and Qwiic/status-LED blocks at checked status. They have passed deterministic checks but are not yet physically verified through the documented two-lot bring-up ladder; pages must not call those current seeds verified.

The output is a gated design candidate for engineering review. Current placement/routing can still produce blocking or review findings, so a generated board is not automatically fab-ready, functionally validated, certified, or safe to order. MakeIRL does not autonomously place a fabrication order from a prompt. Human review, source and output inspection, gate resolution, order-specific fab confirmation, and physical bring-up remain required.