Vibecode an Environmental Sensor PCB with AI and Gate Checks

MakeIRL's generator treats a environmental sensor prompt as a self-contained project board. Current status: current checked demo.

The checked ESP32-C3 + USB-C + Qwiic/status-LED demo can create a carrier for an external Qwiic sensor. An onboard sensor still needs an exact catalog block and cannot be invented from the prompt.

MakeIRL V2 extracts a strict CarrierSpec from the prompt, applies a deterministic scope policy, resolves only cataloged blocks, composes deterministic connectivity and exact-MPN BOM data, emits KiCad artifacts, and runs the manufacturing gate. The language model does not invent pins, topology, parts, placement, routing, or substitutions.

1. External Qwiic sensor MPN/address or exact onboard sensor block, measurement range, accuracy, and exposure
2. Sampling and transmit duty, USB-only power budget, allowable self-heating, and sleep target
3. Enclosure vent location, sensor-to-heat-source spacing, mounting, coating exclusions, and calibration method

Block plan:

• Current checked ESP32-C3 carrier block
• Current checked USB-C power block with two CC pulldowns, ESD, bulk capacitance, and AP2112K rail
• Current checked Qwiic/status-LED block; onboard sensing awaits a separately verified block

Interfaces: I²C/Qwiic, GPIO status, UART or programming interface. Power plan: USB-C 5 V into cataloged 3.3 V regulation; include radio peaks and sensor heater current while remaining below 2 A.

• Put the external Qwiic connector at the enclosure opening, keep radio antenna clear, and separate any future onboard sensing element from LDO, MCU, LED, and cable heat.
• Freeze the board outline, mounting holes, connector faces, component height zones, test access, and keepouts before evaluating generated placement or routing.

Gate checks:

1. S1Generated connectivity and schematic parity. Confirm the two Qwiic pull-ups are not duplicated into an excessive parallel value, address and voltage are compatible, power/ground are not swapped, and the generated current budget retains 30% headroom.
2. S1Catalog and exact-MPN provenance. Every environmental sensor block, footprint, pin map, required companion, BOM line, and block-status claim must resolve to the pinned catalog version; the prompt cannot create missing hardware.
3. S2PCB DRC, fabrication profile, and release identity. Run KiCad DRC and schematic parity, compare geometry with one quoted fab profile, regenerate Gerbers/drills/BOM/CPL from the approved revision, and inspect both local and supplier previews.

• Review the current checked-not-verified block status, antenna keepout, sensor airflow, cleaning/coating exclusions, I²C cable length, and whether external connector pin order matches the ecosystem.
• A reviewer must check primary datasheets, exact symbol-to-footprint mapping, power and protection, return paths, connector orientation, mechanical fit, test coverage, and every gate waiver before release.

Failure modes:

• A temperature/humidity sensor beside the regulator can report board heat, while coating or flux residue at its port can create slow, persistent bias.
• ERC and DRC can prove encoded consistency but cannot prove requirements, component source truth, analogue stability, RF/EMI, thermal margin, firmware, safety, compliance, or delivered product function.

Validation plan:

• Measure rail and radio peaks, compare readings with a reference across temperature/humidity, test response time in enclosure, and log sleep current and I²C errors.
• Bring up first articles with current limiting, measure every rail before fitting expensive modules, program minimal test firmware, exercise every interface and fault assumption, and retain measurements against the released revision.

• Refuse invented onboard sensors, addresses, pinouts, radio matching, batteries, or unsupported environmental interfaces.
• Treat a Qwiic carrier as an interface board, not evidence that the attached sensor is calibrated or physically verified.

The intended carrier envelope is 2-layer FR-4, at most 100 × 100 mm, at most 40 BOM lines, at most 12 V SELV and 2 A, with cataloged modules and low-speed I²C, UART, GPIO, slow SPI, or power-only USB-C connections. The current catalog is narrower than that intended envelope.

Deterministic policy refuses unsupported or hazardous requests, including mains, motors, lithium charging, RF design, switch-mode power, high-speed buses, excessive size/current, and unknown modules. A refusal is a safety and truthfulness result, not a failed attempt to improvise a circuit.

The current seed catalog contains ESP32-C3 carrier, USB-C power, and Qwiic/status-LED blocks at checked status. They have passed deterministic checks but are not yet physically verified through the documented two-lot bring-up ladder; pages must not call those current seeds verified.

The output is a gated design candidate for engineering review. Current placement/routing can still produce blocking or review findings, so a generated board is not automatically fab-ready, functionally validated, certified, or safe to order. MakeIRL does not autonomously place a fabrication order from a prompt. Human review, source and output inspection, gate resolution, order-specific fab confirmation, and physical bring-up remain required.