Minimum trace width and clearance fabs actually accept

“Minimum” can mean three different things

A fabricator’s website may show an impressive smallest trace or gap. Before typing that number into KiCad, determine which minimum it represents:

1. Advertised advanced capability: achievable under restricted materials, copper weights, layers, locations, quantities, and engineering review.
2. Standard order capability: accepted by the normal instant-quote process without a special option.
3. Recommended design value: leaves process margin and usually has better yield, cost, and delivery predictability.

Those are not interchangeable. A fab that can produce a localized 2 mil feature on thin copper is not promising that an entire low-cost board with 2/2 mil routing will pass the standard service.

Capability tables change. The examples below were checked in July 2026; verify the current page and quote for the actual order.

Real published examples

For its two-layer service, OSH Park publishes 6 mil (0.1524 mm) minimum track and 6 mil clearance, with a 5 mil annular ring and 10 mil minimum through-hole drill. Its four-layer service publishes 5/5 mil copper rules. These are clear service-specific design rules rather than a single company-wide record.

JLCPCB describes 3.5 mil (0.09 mm) trace and spacing support for some multilayer designs and recommends 4 mil as a production baseline. The applicable choice still depends on layer count, copper weight, and order options.

PCBWay’s advanced capability table lists localized 2/2 mil features with specific thin base copper, while its standard capability matrix separates ordinary, advanced, and special requirements. That qualification is the important part: the record number is not the default rule for every board.

For an ordinary low-voltage prototype on standard 1 oz copper, 0.15 mm (about 6 mil) width and clearance is a widely portable starting point when routing density allows it. It is not a guarantee across every fab, and it is not an electrical recommendation for power or high voltage. Verify it against the exact service.

Copper weight and layer position change the answer

Outer-layer copper is plated during fabrication, so its final geometry and etch behaviour differ from inner layers. Heavier copper needs more lateral spacing and usually a larger minimum feature because etching a thicker foil cleanly is harder. A table entry for 0.5 oz inner copper cannot be transferred to 2 oz outer copper.

Ask the fabricator or inspect its matrix for:

• starting and finished copper weight;
• inner versus outer layer limits;
• standard versus advanced service;
• whether the minimum can be used globally or only in small areas;
• minimum finished board thickness and via aspect ratio interactions;
• price and lead-time changes triggered by the feature.

If the instant quote asks for your minimum trace/space, choose the smallest actual feature in the files—not the nominal width used on most nets.

Fabrication clearance is not electrical clearance

The fab minimum answers: “Can two copper features be imaged and etched separately?” It does not answer: “Is this spacing safe for the voltage, environment, contamination level, altitude, or regulatory standard?”

Low-voltage digital signals may be limited mainly by process. Mains, battery packs, high-energy nodes, and isolated interfaces require clearance and creepage derived from the applicable safety design, including transients and surface paths. Solder mask should not be used casually as the only reason to shrink a safety separation.

Likewise, minimum trace width does not prove current capacity. A 4 mil trace may fabricate perfectly and overheat at the required current. Determine width from current, allowable temperature rise, copper thickness, length, voltage drop, and cooling conditions. Controlled-impedance traces are sized from the stackup and field solver, not the image-resolution minimum.

Configure enforceable constraints in KiCad

In PCB Editor, open File → Board Setup → Design Rules → Constraints. Set the board-level minimum clearance and minimum track width no smaller than the chosen fabrication process. Configure minimum via diameter, drill, annular width, copper-to-hole clearance, and copper-to-edge clearance too; trace/space is only part of the capability set.

Then use Net Classes for routing defaults such as signal, power, USB, or high voltage. A subtle KiCad point: the track width listed in a net class is a preferred router size, not necessarily a DRC minimum. Board constraints or custom .kicad_dru rules enforce minimum and maximum widths.

For example, a conservative baseline might use:

Board minimum track width: 0.15 mm
Board minimum clearance:   0.15 mm
Default routed width:      0.20 mm
Power routed width:        sized from current requirement

The 0.20 mm default creates process margin while still allowing a deliberate 0.15 mm neck where necessary. If a fab or electrical requirement calls for a larger gap, encode that larger value for the affected nets rather than relying on memory.

Check the whole geometry, not only tracks

Fine-pitch pads may force the smallest copper gap on a board even when every trace uses 0.20 mm. Vias, thermal spokes, zone necks, copper text, and custom footprint graphics can also become the limiting feature. Run DRC and understand any width or clearance violation, then inspect the Gerbers at high zoom.

Measure:

• pad-to-pad gaps in the tightest package;
• trace-to-pad and via-to-pad clearance;
• annular ring after the specified drill;
• copper-to-routed-edge and copper-to-slot distance;
• zone connections and thermal-spoke width;
• solder-mask web separately from copper spacing.

If only one package requires an advanced rule, compare the cost and risk of that process with choosing a larger package. Saving a few square millimetres can move the entire board into a more expensive capability tier.

Send a question the fab can answer

When the table is ambiguous, provide the layer count, copper weight, finished thickness, smallest local width and gap, affected area, and a screenshot or actual Gerber. Ask whether it qualifies for the selected service and order options. “Can you make 3 mil?” lacks the context needed for a dependable answer.

Record the response with the release and configure KiCad to match. Then use the pre-order DFM checklist and check the rejection issues that commonly reach CAM review. The best rule is not the smallest number a marketing table contains; it is the smallest verified constraint your design genuinely needs.