makeIRLPCB engineering field guide

Parts, connectors & sensors

Adding Microchip MCP23017-E/SO to a PCB: layout and gate checks

Add Microchip MCP23017-E/SO to a PCB with real package, electrical, footprint, layout, sourcing, and MakeIRL manufacturing-gate guidance. Includes footprint.

Practical PCB integration · KiCad 9 · Manufacturing gate

Define the exact Microchip MCP23017-E/SO before drawing the footprint

The Microchip MCP23017-E/SO is a 16-bit I²C GPIO expander from Microchip Technology. Its package or board interface is 28-pin SOIC, and its relevant electrical envelope is 1.8–5.5 V. It communicates or connects through I²C with A0–A2; dual interrupt outputs. Those fields belong together: substituting a familiar family name while changing package, voltage, sensing port, mount style, current class, or interface behavior can leave a PCB that passes ordinary net checks and still cannot be assembled or function safely.

MCP23017 supplies two 8-bit GPIO banks with direction, polarity, pull-ups, interrupt-on-change, and sequential register controls.

Common uses include large button matrices and 16-channel logic expansion. Start with the manufacturer drawing and recommended application, then record the exact ordering suffix alongside the KiCad symbol and footprint. This makes the library evidence reviewable when the part is re-sourced months later.

PartMicrochip MCP23017-E/SO
ManufacturerMicrochip Technology
Function16-bit I²C GPIO expander
Package28-pin SOIC
Electrical1.8–5.5 V
InterfaceI²C with A0–A2; dual interrupt outputs
Typical use 1large button matrices
Typical use 216-channel logic expansion

Footprint, placement, and support circuitry

  • Match package width and pitch and place local decoupling at VDD. Put address straps, reset, and interrupt pull-ups close enough to avoid floating during power-up.
  • Group repeated channels clearly and keep high-current PWM or connector returns from sharing narrow ground paths with the IC.

Define RESET and A0–A2, route INTA/INTB as needed, and label GPA/GPB bit order clearly between schematic, connectors, and firmware.

  • Set every address pin explicitly and document the resulting address. Check I/O voltage, power-up state, pull-up capability, interrupt polarity, per-pin current, total package current, and whether outputs are push-pull or quasi-bidirectional.
  • Add external drivers for relays, motors, and high-current LEDs. An expander controls logic; its total package current and clamp diodes are not a substitute for power stages or connector protection.

Put the support components where their current, thermal, optical, RF, or measurement loops are actually short—not merely where ratsnest lines look tidy. Confirm pin one from the package view used in the datasheet, distinguish top view from mating face or bottom view, and check mask, paste, drill, courtyard, enclosure, and rework access independently. A correct copper pad pattern can still be a bad production footprint when the sensing opening, connector latch, exposed pad, thermal path, or cable volume is wrong.

Gate checks that matter for Microchip MCP23017-E/SO

MakeIRL’s release gate should not stop at “the symbol has the right number of pins.” For this part, a useful gate review combines ERC/DRC with the following package- and function-specific evidence:

  1. Check supply, decoupling, I²C pull-ups, address straps, reset, interrupt, channel numbering, default state, per-pin and package current, and connector ESD.
  2. Check that firmware address and bit order match the populated straps and schematic symbols, especially across A/B banks.
  3. Check exact suffix, package and I/O architecture because similarly named expanders differ in reset, pull-ups, interrupt, and output drive.
  4. For Microchip MCP23017-E/SO, check SOIC-28 width, RESET pull, A0–A2 address, INTA/B mode, GPA/GPB order, pull-ups, current limits, I²C rails, and decoupling.

Then run ERC and DRC, refill zones, and inspect the fabrication and assembly outputs. Cross-probe the exact pads named by any finding, compare the BOM MPN with the footprint and electrical limits above, and verify that a real cable, enclosure, antenna, sensor stimulus, load, or thermal path can be tested on the assembled unit. An exclusion is evidence that someone dismissed a marker; it is not evidence that the underlying condition was resolved.

Mistakes, alternates, and sourcing

The most expensive errors are usually plausible: a footprint from a sibling package, a breakout-board voltage copied to the bare IC, a headline current used without thermal analysis, or a connector family selected by pitch alone. For Microchip MCP23017-E/SO, review these failure modes explicitly:

  • Using the SPI MCP23S17 symbol or IOCON assumptions can leave address/control pins mapped incorrectly despite a similar part name.
  • Leaving address pins open and getting a board-dependent I²C address.
  • Driving LEDs or relays beyond total package current even though each individual pin appears below its limit.

Sourcing note. Specify MCP23017-E/SO and verify current revision/errata; MCP23017 and MCP23S17 are protocol-specific, not automatic alternates. The approved vendor list should preserve manufacturer, full suffix, package, voltage/range/accuracy grade, lifecycle, and mating or external components. An alternate is real only after its datasheet, land pattern, electrical behavior, firmware assumptions, and assembly process have all been compared—not because a distributor search places it in the same parametric row.

Check the design before fabrication

Run the release gate on the KiCad project that uses Microchip MCP23017-E/SO.

Check a KiCad project