ENIG PCB Finish: Manufacturing, DFM, and When to Use It

This is a board attribute manufacturing profile for ENIG PCB finish. The board profile below is a process-specific baseline that still needs order-specific confirmation, not a guaranteed price or capability.

Capabilities, prices, lead times, approved materials, assembly stock, shipping, and taxes change. Requote the exact revision and retain the supplier's order-specific confirmation before release.

• Choose ENIG for flat fine-pitch lands, wire-bond/contact requirements only when separately qualified, or storage needs—not because gold color implies superior conductivity.
• Choose the attribute because a measured electrical, thermal, mechanical, assembly, or lifecycle requirement needs it; document the requirement and the simpler alternative considered.

Specify applicable finish standard/class, thickness range, solderable area, edge contacts, and whether selective finishes or hard gold are actually required.

• Obtain the actual stackup, material, tolerance, coupon, panel, and process notes before routing; the same marketing label can describe materially different constructions.

• ENIG is flat and solderable but still needs correct paste, reflow, pad geometry, cleanliness, and incoming finish quality.
• Check how the fabrication choice changes stencil, reflow, handling, depanelization, warpage, inspection, repair, and component compatibility.

Validation plan:

• Inspect coverage and solderability, review finish certificates where risk warrants, and test contact wear separately because ordinary ENIG is not hard gold.
• Measure the property that justified the attribute—impedance, temperature rise, bend life, solderability, flatness, or interconnect reliability—on representative built boards.

Cost drivers:

• ENIG adds chemical processing and gold/nickel control; area, panel, selective plating, certification, and lead time influence the increment.
• Special materials and process steps can add tooling, minimum quantity, engineering review, lower panel yield, and longer queues even when raw board area is unchanged.

• ENIG is not appropriate as an unspecified high-cycle edge-contact finish and cannot protect cut board edges unless edge plating is ordered.
• Paying for an attribute without encoding its constraints in the design produces a more expensive board with no guaranteed performance benefit.

Ask the fabricator directly:

• Which ENIG specification and nickel/gold thickness range will the order meet, and is certification available?
• Are any pads actually high-cycle contacts requiring hard gold or another finish rather than ENIG?

1. S1Schematic/PCB parity and unresolved connectivity. Run ERC, DRC with schematic parity, and netlist comparison for the ENIG PCB finish release; explain every exclusion rather than suppressing it globally.
2. S2Quoted fabrication-profile compliance. Compare saved copper, holes, mask, outline, and nickel barrier plus thin immersion-gold coating on exposed copper constraints with the exact quoted stackup and option set.
3. S1BOM, placement, polarity, and output identity. Require exact MPNs, matched BOM/CPL reference sets, reviewed rotations, one clean outline, and fabrication outputs regenerated from the approved ENIG PCB finish source revision.