Manufacturing & fabrication intents
ENIG vs Lead-Free HASL: PCB Finish Tradeoff Practical Guide
Compare ENIG and lead-free HASL by pad flatness, fine-pitch yield, solderability, storage, contact use, ready for fabrication-specific DFM review.
Practical PCB integration · KiCad 9 · Manufacturing gate
Manufacturing plan for ENIG versus lead-free HASL
This is a board attribute manufacturing profile for ENIG versus lead-free HASL. The board profile below is a process-specific baseline that still needs order-specific confirmation, not a guaranteed price or capability.
| Intent | ENIG versus lead-free HASL |
|---|---|
| Layers | Either finish works across common layer counts |
| Copper | Base/finished copper is independent of finish selection |
| Thickness | Board thickness is independent |
| Finish | Decision between ENIG and lead-free HASL |
| Special process | Flat nickel/gold finish versus hot-air-leveled solder coating |
Capabilities, prices, lead times, approved materials, assembly stock, shipping, and taxes change. Requote the exact revision and retain the supplier's order-specific confirmation before release.
Design priorities and fabrication notes
- Select from the smallest and most planarity-sensitive package, contact requirement, storage, rework, supplier capability, and total assembly economics.
- Choose the attribute because a measured electrical, thermal, mechanical, assembly, or lifecycle requirement needs it; document the requirement and the simpler alternative considered.
Compare the same vendor, stackup, panel, specification, and quantity; finish names alone do not define thickness, quality, or shelf life.
- Obtain the actual stackup, material, tolerance, coupon, panel, and process notes before routing; the same marketing label can describe materially different constructions.
Assembly, validation, and cost drivers
- ENIG offers flatter lands for QFN/BGA; lead-free HASL is often robust for through-hole/coarser SMT but can vary more in pad height.
- Check how the fabrication choice changes stencil, reflow, handling, depanelization, warpage, inspection, repair, and component compatibility.
Validation plan:
- Build representative coupons or first articles with the critical package mix and compare solder joint quality, inspection, rework, and stored solderability.
- Measure the property that justified the attribute—impedance, temperature rise, bend life, solderability, flatness, or interconnect reliability—on representative built boards.
Cost drivers:
- Compare finish premium against assembly yield, rework, storage, inspection, and any separate hard-gold need rather than board subtotal alone.
- Special materials and process steps can add tooling, minimum quantity, engineering review, lower panel yield, and longer queues even when raw board area is unchanged.
Failure modes and questions for the fabricator
- Choosing ENIG for marketing or HASL for price without examining the critical package can optimize the wrong part of the job.
- Paying for an attribute without encoding its constraints in the design produces a more expensive board with no guaranteed performance benefit.
Ask the fabricator directly:
- Which fitted component has the strictest coplanarity, pitch, contact, or storage requirement?
- What exact finish specification, thickness, warranty, and assembly-yield data apply to each quoted option?
Gate checks for ENIG versus lead-free HASL
- S1Schematic/PCB parity and unresolved connectivity. Run ERC, DRC with schematic parity, and netlist comparison for the ENIG versus lead-free HASL release; explain every exclusion rather than suppressing it globally.
- S2Quoted fabrication-profile compliance. Compare saved copper, holes, mask, outline, and flat nickel/gold finish versus hot-air-leveled solder coating constraints with the exact quoted stackup and option set.
- S1BOM, placement, polarity, and output identity. Require exact MPNs, matched BOM/CPL reference sets, reviewed rotations, one clean outline, and fabrication outputs regenerated from the approved ENIG versus lead-free HASL source revision.
Check the design before fabrication
Run the release gate on the KiCad project intended for ENIG versus lead-free HASL.
Check a KiCad project→