1.27 mm Dual-Row Pin Header Footprint and DFM Practical Guide

1.27 mm 2×N vertical pin header is a through hole package used for through hole assembly, also seen labeled 0.05-inch dual-row header, 2×N P1.27, micro mezzanine header. A dependable footprint follows the exact orderable-device drawing rather than the family name: nominal body Often about 2.5–3.0 mm wide, overall span Length and stack height depend on series, seated height Low-profile and stacking versions differ, pitch 1.27 mm within and between rows, pin count Variable 2×N array, and exposed pad Small plated through-hole annuli.

Use one compatible header/socket series and its exact hole, post, row, and stack-height dimensions.

Typical uses include compact board stacks, dense programming connectors, instrument modules. The pitch grid alone does not guarantee intermateability; header and socket series must be selected as a pair.

• A dual 1.27 mm grid packs four holes into the area of one 2.54 mm cell, sharply reducing routing channels and registration margin.
• The finished hole must fit the lead at maximum material condition plus insertion tolerance and plating; the drill file normally specifies the pre-plating tool size.

Map mating-side numbering, reserve both connector bodies through the full stack, and place board-to-board alignment features where needed.

• Reserve the full connector or component envelope on both sides, include mating and wire-entry space, and keep copper clear of hardware and hand-tool access.

Hand assembly is rated hard. Precision fixture plus fine hand, wave, or selective soldering. Watch for row-to-row bridges, mirrored numbering, and hole breakout.

• Check copper web, mask dams, drill wander, and solder-bridge risk across both dense rows before panel release.
• Choose annular rings from the fabricator's registration allowance and confirm whether slots, press-fit holes, or non-plated features need separate drill outputs.
• Account for wave or selective solder orientation, pallet access, thermal spokes, and bottom-side protrusion before panel release.

Inspection focus:

• Magnify both rows for bridges and fill, then mate the full stack and continuity-test all pins while applying modest mechanical movement.
• Inspect barrel fill, wetting around the lead, polarity, seating, and mechanical alignment; continuity alone does not prove a durable connector joint.

Common mistakes:

• A footprint can have 1.27 mm pitch along each row but an incorrect 2.00 mm row spacing that no production socket can accept.
• Do not use nominal lead width as the finished-hole size or forget that plating reduces the hole after drilling.

1. Before approving 1.27 mm 2×N vertical pin header, compare the exact orderable-device drawing with the library item: body range (Often about 2.5–3.0 mm wide), terminal or lead span (Length and stack height depend on series), pitch (1.27 mm within and between rows), pin count (Variable 2×N array), height (Low-profile and stacking versions differ), and exposed-pad definition (Small plated through-hole annuli). Record the source drawing revision and every intentional courtyard, toe, heel, side, mask, or paste adjustment.
2. Treat the hard hand-solder rating as a prototype-planning input, not proof of production yield. Review row-to-row bridges, mirrored numbering, and hole breakout with the assembler, confirm that precision fixture plus fine hand, wave, or selective soldering is compatible with the build, and require the S1 connectivity gate plus relevant S2 geometry checks to pass against the released footprint and selected fabrication profile.

Manufacturing gate checks:

1. S1Pad count, numbering, and schematic parity. Both pitch axes, finished-hole tolerance, annular rings, mirrored view, pin count, and stack height are required evidence.
2. S2Finished-hole tolerance and annular ring. The lead must insert after plating while retaining enough copper for registration, solder fill, and mechanical load.
3. S2Finished-hole size and annular ring. Drill, plating, lead tolerance, and the remaining annular ring must agree with the fab capability.