Vibecode a Robot Sensor Hub PCB with AI and Gate Checks

MakeIRL's generator treats a robot sensor hub prompt as a self-contained project board. Current status: in envelope needs block.

A low-speed hub isolated from motor drive can fit after exact sensor/connector/protection blocks exist. Motor control, high-current power, and unknown modules remain refused.

MakeIRL V2 extracts a strict CarrierSpec from the prompt, applies a deterministic scope policy, resolves only cataloged blocks, composes deterministic connectivity and exact-MPN BOM data, emits KiCad artifacts, and runs the manufacturing gate. The language model does not invent pins, topology, parts, placement, routing, or substitutions.

1. Exact sensors/modules, interfaces, voltages, addresses, interrupt pins, cable lengths, sampling, orientation, and environment
2. Controller/module, port count/pinouts, pull-ups, ESD, hot-plug policy, aggregate current, motor-ground relationship, and reporting
3. Robot mounting, harness strain/keying, sensor axes, connector access, enclosure, programming, and fixture test

Block plan:

• Current checked ESP32-C3 carrier when suitable
• Verified multiport sensor/GPIO/UART protection and connector blocks
• Only exact cataloged sensors; expose ports rather than invent modules

Interfaces: I²C, UART, protected GPIO. Power plan: USB or verified 5 V input under 2 A; motor/battery/high-current rails remain electrically outside the generated hub.

• Put protection at harness entries, maintain clear ground return, separate sensor heat/orientation zones, and keep motor-current copper off the board.
• Freeze the board outline, mounting holes, connector faces, component height zones, test access, and keepouts before evaluating generated placement or routing.

Gate checks:

1. S1Generated connectivity and schematic parity. Check every connector map, voltage, address/pull-up, GPIO boot conflict, UART direction, ESD return, current headroom, and sensor orientation mark.
2. S1Catalog and exact-MPN provenance. Every robot sensor hub block, footprint, pin map, required companion, BOM line, and block-status claim must resolve to the pinned catalog version; the prompt cannot create missing hardware.
3. S2PCB DRC, fabrication profile, and release identity. Run KiCad DRC and schematic parity, compare geometry with one quoted fab profile, regenerate Gerbers/drills/BOM/CPL from the approved revision, and inspect both local and supplier previews.

• Review cable common mode and ESD, motor noise, grounding, sensor axes and placement, hot plugging, address conflicts, harness retention, and failure behavior.
• A reviewer must check primary datasheets, exact symbol-to-footprint mapping, power and protection, return paths, connector orientation, mechanical fit, test coverage, and every gate waiver before release.

Failure modes:

• A hub can reset when robot actuators switch through shared supply/ground impedance even though it carries no motor driver itself.
• ERC and DRC can prove encoded consistency but cannot prove requirements, component source truth, analogue stability, RF/EMI, thermal margin, firmware, safety, compliance, or delivered product function.

Validation plan:

• Test every port with real harness lengths and all sensors active, inject motor-like supply noise safely, measure bus edges/current, and verify orientation and disconnect faults.
• Bring up first articles with current limiting, measure every rail before fitting expensive modules, program minimal test firmware, exercise every interface and fault assumption, and retain measurements against the released revision.

• Refuse motor drivers, battery charging, high-current rails, unknown sensors, or unsafe robotic control claims.
• Keep the generated board a bounded sensor interface, not an autonomous robot controller.

The intended carrier envelope is 2-layer FR-4, at most 100 × 100 mm, at most 40 BOM lines, at most 12 V SELV and 2 A, with cataloged modules and low-speed I²C, UART, GPIO, slow SPI, or power-only USB-C connections. The current catalog is narrower than that intended envelope.

Deterministic policy refuses unsupported or hazardous requests, including mains, motors, lithium charging, RF design, switch-mode power, high-speed buses, excessive size/current, and unknown modules. A refusal is a safety and truthfulness result, not a failed attempt to improvise a circuit.

The current seed catalog contains ESP32-C3 carrier, USB-C power, and Qwiic/status-LED blocks at checked status. They have passed deterministic checks but are not yet physically verified through the documented two-lot bring-up ladder; pages must not call those current seeds verified.

The output is a gated design candidate for engineering review. Current placement/routing can still produce blocking or review findings, so a generated board is not automatically fab-ready, functionally validated, certified, or safe to order. MakeIRL does not autonomously place a fabrication order from a prompt. Human review, source and output inspection, gate resolution, order-specific fab confirmation, and physical bring-up remain required.