SOIC-16 PCB Footprint: Dimensions, DFM, and Assembly Guide

SOIC-16 is a gull wing package used for surface mount assembly, also seen labeled SO-16, narrow SOIC-16, JEDEC MS-012 AC. A dependable footprint follows the exact orderable-device drawing rather than the family name: nominal body 3.9 × 9.9 mm nominal, overall span About 6.0 mm lead span, seated height Typically 1.35–1.75 mm, pitch 1.27 mm, pin count 16, and exposed pad None on standard narrow SOIC-16.

Tie the footprint name to body width and lead span, not merely SOIC-16, because wide isolation packages share the pin count.

Typical uses include LED drivers, logic interfaces, multi-channel analog ICs. Narrow SOIC-16 is commonly 3.9 mm wide at 1.27 mm pitch; wide-body SOIC-16 is a different footprint class.

• Eight 1.27 mm-pitch leads per side yield a body near 9.9 mm long; wide-body SOIC-16 parts can have entirely different isolation intent and land span.
• Gull-wing package names cover families of drawings; body width, lead span, lead length, and seated height must all match the orderable part.

Keep channel outputs and returns organized by pin group, provide local supply decoupling, and respect creepage if the chosen wide-body alternative is for isolation.

• Route away from the lead toe, preserve visible solder fillets, and keep the pin-one cue unambiguous on copper, silkscreen, and the assembly drawing.

Hand assembly is rated easy. Drag soldering with flux or standard reflow. Watch for mixing 3.9 mm narrow, 5.3 mm, and 7.5 mm wide-body variants.

• State body width in the BOM-footprint mapping and verify paste-row registration at both ends of the long package.
• Use symmetric paste apertures and a real component courtyard so placement does not rotate or crowd neighboring parts.
• Do not lengthen every pad for hand soldering on the production footprint; excessive toe extension consumes routing and can increase solder movement.

Inspection focus:

• Use the end pins to judge alignment, inspect every toe fillet, and electrically exercise all channels rather than testing only supply current.
• All lead toes should be optically accessible. Inspect alignment, heel/toe wetting, bridges, lifted leads, and orientation before functional test.

Common mistakes:

• Selecting a narrow footprint for a wide-body digital isolator defeats both physical fit and the creepage distance the package was chosen to provide.
• Never infer functional pin numbering from another IC in the same mechanical family; verify symbol, footprint, and datasheet together.

1. Before approving SOIC-16, compare the exact orderable-device drawing with the library item: body range (3.9 × 9.9 mm nominal), terminal or lead span (About 6.0 mm lead span), pitch (1.27 mm), pin count (16), height (Typically 1.35–1.75 mm), and exposed-pad definition (None on standard narrow SOIC-16). Record the source drawing revision and every intentional courtyard, toe, heel, side, mask, or paste adjustment.
2. Treat the easy hand-solder rating as a prototype-planning input, not proof of production yield. Review mixing 3.9 mm narrow, 5.3 mm, and 7.5 mm wide-body variants with the assembler, confirm that drag soldering with flux or standard reflow is compatible with the build, and require the S1 connectivity gate plus relevant S2 geometry checks to pass against the released footprint and selected fabrication profile.

Manufacturing gate checks:

1. S1Pad count, numbering, and schematic parity. The footprint identity, sixteen-pad count, body width, and any isolation courtyard must match the exact orderable device.
2. S2Lead-to-pad alignment and solder-mask web. Pitch, toe extension, and mask slivers must fit the selected assembly capability without hiding a lead.
3. S2Courtyard and body clearance. The body, leads, placement tolerance, rework access, and nearby height limits all belong in the manufacturing review.