KiCad footprint vs symbol: what PCB beginners get wrong

A symbol is logic; a footprint is manufactured geometry

A KiCad symbol is the schematic representation of a component. It defines pins, pin names and numbers, electrical pin types, graphical units, and fields such as value and datasheet. Its job is to make circuit intent readable and electrically checkable.

A footprint is the pattern built on the PCB. It defines copper pads, holes, solder mask and paste openings, courtyard, fabrication outline, reference text, and usually a 3D model. Its job is to fit a particular physical package and communicate land geometry to fabrication and assembly.

They do not need to look alike. An op-amp symbol may be split into two amplifier units and a power unit, while the footprint is one eight-pad package. A connector symbol may be drawn as a tidy numbered list while the footprint follows a staggered physical layout.

The link between them is simple and unforgiving: symbol pin identifiers map to footprint pad identifiers. Pin 1 connects to pad 1, pin A1 connects to pad A1, and so on. KiCad does not infer mapping from position, pin name, or the shape of the drawing.

“Same pin count” does not mean “same package”

Choosing an eight-pad footprint for an eight-pin symbol proves almost nothing. SOIC-8, TSSOP-8, DFN-8, DIP-8, and vendor-specific leadless packages can all have eight electrical connections with incompatible pitch, body size, pad geometry, exposed-pad requirements, and numbering.

Even a family name can be ambiguous. “SOT-23-5” describes a broad package class, but land-pattern recommendations vary with body dimensions and lead geometry. QFN ordering codes can differ in pitch, body size, and exposed-pad segmentation. USB-C receptacles with similar shells can use completely different shield tabs and locating pegs.

Read the exact package code from the selected manufacturer’s full MPN, then compare the mechanical drawing with the footprint. A robust BOM built around real part numbers makes that chain reviewable: MPN → package drawing → footprint.

Verify pin and pad numbering from the correct view

Numbering mistakes can produce a board that routes cleanly and is electrically wrong. Common traps include:

• transistor symbols whose G-S-D or B-C-E order does not match the selected package variant;
• op-amps offered in multiple pinouts under related family names;
• connectors numbered from the mating face while a footprint is viewed from the board side;
• bottom-entry connectors whose drawing is mirrored relative to a top-entry part;
• QFN exposed pads that require a numbered electrical connection rather than an unnumbered shape;
• multi-unit symbols with power pins placed in a separate unit.

Use the datasheet’s pin table and package drawing together. Write a short mapping during review if the views are confusing:

symbol pin 1 (EN)   -> footprint pad 1 -> package pin 1 marker
symbol pin 2 (GND)  -> footprint pad 2 -> package lead 2
symbol pin 3 (SW)   -> footprint pad 3 -> package lead 3
symbol pin 9 (EP)   -> footprint pad 9 -> exposed pad

Check the physical pin-one marker in Footprint Editor and 3D Viewer, but do not treat a 3D model as authoritative. Models can be missing, offset, or borrowed from a dimensionally similar package.

Footprint filters help search; they do not approve a part

Symbols in KiCad libraries can include footprint filters such as SOIC*3.9x4.9mm*P1.27mm*. In Tools → Assign Footprints, these filters narrow the candidates. Pin-count and library filters are useful too.

No filter verifies the selected manufacturer’s tolerances, thermal-pad pattern, hole diameter, or assembly process. It is a search hint, not a sign-off. Open the candidate in Footprint Viewer and compare at least:

• pad pitch and centre-to-centre spacing;
• copper pad width and length;
• body outline and maximum dimensions;
• exposed-pad size and paste segmentation;
• drill and finished-hole sizes for through-hole leads;
• locating pegs, mounting tabs, and board-edge relationship;
• courtyard and component-height needs.

For a hand-soldered prototype, a slightly extended IPC-style land pattern can be helpful. For dense production, the manufacturer’s recommended pattern and assembler’s process may drive different toe, heel, mask, or paste choices. Record intentional deviations.

Libraries and project instances serve different roles

Use global KiCad libraries for standard, trusted parts and project libraries for custom or frozen geometry. If you modify a standard footprint directly in a system library, an update can overwrite it or another workstation may not have the same edit. Copy it into a project footprint library, rename it clearly, and commit the .pretty directory and library table.

Likewise, correct a symbol’s pin electrical type or numbering in a project symbol library rather than patching only a single rendered sheet. ERC depends on symbol pin types; PCB connectivity depends on pin numbers. Both deserve review.

After changing a footprint assignment in the schematic, run Tools → Update PCB from Schematic. Review whether KiCad replaces the footprint and how that affects routed pads. The schematic parity workflow explains why editing only the board creates drift.

A practical part-to-board verification loop

For every unfamiliar component:

1. Select the exact MPN from electrical requirements.
2. Save the manufacturer datasheet link in the symbol.
3. Confirm the symbol pin names, identifiers, types, and hidden pins.
4. Identify the package code in the ordering information.
5. Assign a footprint for that exact package.
6. Compare footprint dimensions and numbering with the drawing.
7. Inspect mask, paste, courtyard, and 3D orientation.
8. Update the PCB, route it, refill zones, and run parity plus DRC.
9. Print the footprint at 1:1 or place the real part on a paper plot when geometry is uncertain.

The paper check is especially effective for connectors, switches, displays, and modules. It catches a reversed board edge or misplaced mounting tab that electrical rules cannot see.

Know what each check can and cannot prove

ERC can flag incompatible symbol pin types, but it cannot prove the footprint fits. DRC can flag clearance, courtyard, and connectivity problems, but a perfectly numbered wrong package may pass. The 3D view can expose obvious collisions, but it is only as accurate as its models. A pre-order DFM review must combine those checks with datasheet and mechanical inspection.

The most expensive beginner mistake is treating “no KiCad errors” as evidence that the chosen symbol and footprint describe the purchased component. KiCad verifies the model you gave it. The engineer still has to prove that model matches the part in the reel.