How to Vibecode an ESP32 Board (and What to Check)

Constrain the board before prompting

“Make an ESP32 sensor board” leaves nearly every decision open: which ESP32, chip or module, programming interface, regulator, connector, GPIO assignment, antenna location, and assembly process. An AI will fill those gaps, often with a coherent circuit built from incompatible assumptions.

Write a one-page hardware contract first. For example:

mcu: ESP32-C3-MINI-1-N4, exact MPN to be verified
input: USB-C, 5 V, power sink and USB 2.0 device only
rail: 3.3 V, regulator rated for at least 500 mA
programming: native USB plus EN and BOOT buttons
sensors:
  - I2C, 3.3 V, addresses 0x44 and 0x76
outputs:
  - one active-high status LED
mechanical: 45 mm x 25 mm, two M3 mounting holes
assembly: one-sided SMT, 0603 passives minimum

Then attach the exact module datasheet, hardware design guide, connector drawing, regulator datasheet, and sensor datasheets. Ask the model to cite a document and table or pin name for every non-obvious connection. If it cannot point to the source, mark the choice unresolved instead of letting it guess.

Choosing a pre-certified module avoids the bare chip’s flash, crystal, and RF matching network. It does not remove power, boot, USB, antenna-clearance, or GPIO-strapping work. The ESP32-C3 carrier board guide covers that smaller problem in detail.

Review a schematic as named nets

Do not review only a rendered picture. Export a netlist or connection table and check each critical net against the reference design. For a USB-powered ESP32-C3 module carrier, the intended circuit can be described in words:

USB VBUS -> input protection -> 3.3 V regulator IN
3V3 -> module 3V3, sensor VDD, I2C pull-ups, local capacitors
GND -> every ground pin, connector shield strategy, exposed pads as specified
EN -> pull-up/RC network, reset switch to GND
GPIO9 -> pull-up, BOOT switch to GND
USB D- / D+ -> assigned native USB pins through the reference network

That description is a review checklist, not universal values. Use the regulator datasheet for input/output capacitance and stability. Use the selected module datasheet for USB pins and recommended EN circuit. ESP32 variants are not pin-compatible: instructions for an ESP32-S3 can be wrong for an ESP32-C3 even when both examples compile.

Check that every connector pin has a direction and voltage domain. Check that I2C pull-ups go to 3.3 V, not USB VBUS. Check that the LED cannot force a boot strap to the wrong level at reset. If a peripheral shares GPIO2, GPIO8, or GPIO9 on an ESP32-C3, calculate the effective startup level including every pull resistor and the peripheral’s unpowered behavior. The reset and boot circuit guide explains why a circuit can pass ERC and still boot incorrectly.

Treat USB-C as its own circuit

A USB-C receptacle is not a two-pin power jack. A simple sink needs one 5.1 kΩ pull-down from CC1 to ground and another from CC2 to ground. A USB 2.0 device joins the duplicate D+ pins and duplicate D- pins correctly, protects the external lines against ESD, and leaves unsupported SuperSpeed and sideband pins unconnected as specified.

Verify the connector symbol against the manufacturer’s pad numbering; Type-C footprints are easy to mirror. Test both plug orientations and both C-to-C and A-to-C cables. The full USB-C power, CC resistor, and ESD checklist is worth completing before placement.

Place the antenna first

Put the module at a board edge before placing the regulator or connectors. For a module with a PCB antenna, follow its land pattern and antenna keepout on every copper layer. Ideally the antenna end projects beyond the carrier edge. Otherwise keep copper, traces, components, batteries, displays, mounting hardware, and enclosure metal out of the specified region.

Do not route USB, clocks, or a ground-plane peninsula beneath the antenna. Maintain solid ground beneath the module’s grounded area, add stitching vias as the module guide shows, and keep the regulator’s switching loop away from the radio end. The module’s certification does not guarantee range or regulatory compliance in your enclosure; antenna performance must be checked in the final mechanical assembly.

For USB full speed, route D+ and D- together over a continuous reference plane. Use the fabricator’s stackup to calculate geometry instead of copying a trace width from another board. Avoid layer changes and stubs. Put ESD protection at the connector, not beside the microcontroller.

Make the AI produce review artifacts

A useful generated change includes more than KiCad files. Ask for:

• a pin-assignment table with strapping and reset-state notes;
• a power budget with source for peak-current assumptions;
• exact manufacturer part numbers and package variants;
• an ERC/DRC report with exclusions listed;
• a connector pin-to-pad audit;
• a bring-up test plan.

Run KiCad ERC and DRC independently. Inspect every exclusion: no connect should mean intentionally unused, while no ERC should have a written electrical reason. Compare schematic and PCB so a late symbol edit has not left the layout stale. A manufacturing gate should stop release if any of these artifacts is missing.

Bring up one subsystem at a time

Before applying power, inspect the first assembled board under magnification and measure resistance from 3.3 V to ground. Power it from a current-limited supply if the architecture allows. Confirm VBUS, regulator output, and EN before connecting a computer.

Then test in this order:

1. Reset and download mode work repeatedly.
2. The host enumerates native USB, or UART logs are readable.
3. A minimal firmware toggles one safe GPIO.
4. I2C devices acknowledge at their expected addresses.
5. Wi-Fi transmits while 3.3 V is observed for droop.
6. Both USB plug orientations and the intended cable types work.

Record voltages, current, firmware commit, and failures. “It flashed once” is not a production test. Vibecoding can shorten schematic entry and documentation, but the board becomes real only when every generated assumption has a source and every critical interface has a repeatable test.