Courtyard, Keepout, and Clearance: PCB Terms Decoded

The three boundaries answer different questions

These terms are often drawn as outlines in a PCB editor, but they protect different things:

Term	Main question	Typical owner
Courtyard	Can this component be placed and assembled here?	Footprint/library
Keepout or rule area	What objects are forbidden or constrained in this region?	Board/layout
Clearance	How far apart must two objects be?	Electrical/manufacturing rules

A connector can have all three: a courtyard around its body, a keepout under its mating latch, and a copper-clearance rule between pads. Treating them as synonyms removes information DRC and reviewers need.

Courtyards reserve assembly space

KiCad footprints normally draw an outline on F.CrtYd or B.CrtYd. It represents the component body plus an assembly allowance, not the copper pads and not necessarily the full space needed to mate a cable. Pick-and-place machines, soldering tools, inspection, and neighboring components need room around the package.

Overlapping courtyards can indicate components are physically colliding or too close for the assembly process. Some intentional overlaps are valid—for example, alternative mutually exclusive footprints or a component tucked under a connector overhang when height permits—but they require a 3D/mechanical check and a documented exception.

Use the manufacturer’s package dimensions and an IPC-style library policy when building a courtyard. Include body tolerances and protrusions. A missing or undersized 3D model does not make the courtyard wrong; the 3D model is another review aid, while the courtyard is the DRC-readable assembly envelope.

Courtyards are usually not enough for cable bend radius, screwdriver access, removable module insertion, or enclosure walls. Model those with dedicated mechanical drawings and keepout/rule areas.

Keepouts prohibit specific board objects

A keepout is an area where selected object types are not allowed. In KiCad, a rule area can prohibit tracks, vias, copper pours, footprints, or combinations of them. Define the layer scope and restrictions explicitly.

Common examples are:

• no copper on any layer below a PCB antenna;
• no components under a board-to-board connector’s mating body;
• no tracks or vias where an enclosure boss touches the board;
• no copper around a mounting hole and metal washer;
• no pours below a high-impedance capacitive-sense electrode;
• route restriction around an isolation barrier.

“Keepout” without saying keep what out is ambiguous. An antenna region may forbid copper, tracks, vias, and components on every layer. A mounting screw area may allow ground copper but forbid components and signals. A connector overhang can allow copper on inner layers but no top-side components.

Draw rule areas from controlled dimensions and name them by purpose. Lock them if accidental movement would be dangerous. Check whether the restriction applies to zone fill after pressing B; an outline that looks empty before refill may fill unexpectedly later.

Clearance is a measured separation

Clearance rules set minimum distance between object classes. The most familiar is copper-to-copper electrical spacing. KiCad determines the required value from board constraints, net classes, and custom rules, then DRC checks actual geometry.

Different clearances solve different problems:

• copper-to-copper prevents shorts and supports voltage isolation;
• copper-to-board-edge accounts for routing tolerance and exposed copper;
• pad-to-mask expansion controls solder-mask openings;
• silkscreen-to-mask keeps ink off solderable pads;
• hole-to-copper protects annular rings and internal features;
• component-to-component spacing supports assembly.

These values are not interchangeable. A fabricator’s 0.10 mm trace spacing does not imply 0.10 mm is safe from copper to a routed edge, nor that it meets a high-voltage creepage requirement. Voltage, pollution degree, material, altitude, certification standard, and manufacturing capability can all govern spacing.

For hole geometry, read drill sizes and annular rings. For mask geometry, read solder mask bridges explained.

Thermal relief is not ordinary clearance

A pad connected to a copper zone often uses thermal spokes. The gap around the rest of the pad is the thermal-relief clearance, and the spokes provide the connection. This makes soldering easier by reducing heat flow into the plane.

Do not mistake that visible gap for an unconnected pad. Highlight the net and inspect zone properties. Conversely, four thin spokes can be electrically connected yet inadequate for high current. Choose solid connection or wider/more spokes where current and thermal analysis require it, while considering assembly.

Zone settings also include clearance to other nets, minimum fill width, and removal of isolated islands. The copper pour guide explains how those settings change current paths.

Configure KiCad from the manufacturing process

In Board Setup, enter global constraints and net-class rules based on the intended fabricator and stackup. Use custom rules or rule areas for local exceptions instead of weakening the whole board. Examples include tighter clearance inside a proven fine-pitch footprint or larger spacing on a high-voltage net.

When importing a footprint, audit:

1. Pad dimensions and pitch against the land-pattern drawing.
2. Courtyard against maximum body dimensions.
3. Component height and overhang in mechanical models.
4. Local keepouts required by the datasheet.
5. Solder-mask and paste settings.

Then run DRC and review rather than bulk-excluding courtyard or clearance findings. The KiCad DRC violations reference helps distinguish a real collision from a library or rule problem.

Review the assembled object

Before release, inspect top and bottom board views, refill zones, and open the 3D viewer. Overlay the enclosure, mating connectors, antennas, batteries, heat sinks, and fasteners in MCAD or a dimensioned assembly drawing. Verify cable insertion paths and tool access.

Ask three separate questions for every crowded area:

Courtyard: can both parts be assembled?
Keepout: is the forbidden geometry actually absent?
Clearance: is the measured spacing above its rule?

When each boundary has one job, a DRC finding is actionable. When outlines are copied without meaning, the board can be rule-clean and still impossible to assemble.